8

3387L–DFLASH–6/06

AT45DB321C

5.3.2

Main Memory Page to Buffer Compare

A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate

the operation, an 8-bit opcode, 60H for buffer 1 and 61H for buffer 2, must be followed by

24 address bits consisting of one reserved bit, 13 address bits (PA12 - PA0) which specify the

page in the main memory that is to be compared to the buffer, and ten don’t care bits. The CS

pin must be low while toggling the SCK pin to load the opcode, the address bits, and the don’t

care bits from the SI pin. On the low-to-high transition of the CS pin, the 528 bytes in the

selected main memory page will be compared with the 528 bytes in buffer 1 or buffer 2. During

this time (t

pare operation, bit 6 of the status register is updated with the result of the compare.

5.3.3

Auto Page Rewrite

This mode is only needed if multiple bytes within a page or multiple pages of data are modified in

a random fashion. This mode is a combination of two operations: Main Memory Page to Buffer

Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of data is first

transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1

or buffer 2) is programmed back into its original page of main memory. To start the rewrite oper-

ation, a 1-byte opcode, 58H for buffer 1 or 59H for buffer 2, must be clocked into the device,

followed by three address bytes comprised of one reserved bit, 13 page address bits

(PA12-PA0) that specify the page in main memory to be rewritten and 10 don’t care bits. When a

low-to-high transition occurs on the CS pin, the part will first transfer data from the page in main

memory to a buffer and then program the data from the buffer back into same page of main

memory. The operation is internally self-timed and should take place in a maximum time of t

During this time, the status register and the RDY/BUSY pin will indicate that the part is busy.

If a sector is programmed or reprogrammed sequentially page by page, then the programming

algorithm shown in Figure 15-1 on page 31 is recommended. Otherwise, if multiple bytes in a

page or several pages are programmed randomly in a sector, then the programming algorithm

shown in Figure 15-2 on page 32 is recommended. Each page within a sector must be

updated/rewritten at least once within every 10,000 cumulative page erase/program operations

in that sector.

5.3.4

Status Register Read

The status register can be used to determine the device’s ready/busy status, the result of a Main

Memory Page to Buffer Compare operation, or whether the sector protection has been enabled.

To read the status register, an opcode of D7H must be loaded into the device. After the opcode

and optional dummy byte is clocked in, the 1-byte status register will be clocked out on the out-

put pin (SO), starting with the next clock cycle. For applications over 25 MHz, the opcode must

be always followed with a dummy (don’t care) byte. The data in the status register, starting with

the MSB (bit 7), will be clocked out on the SO pin during the next eight clock cycles.

The most-significant bits of the status register will contain device information, while the remain-

ing least-significant bit is reversed for future use and will have undefined value. After the one

byte of the status register has been clocked out, the sequence will repeat itself (as long as CS

remains low and SCK is being toggled). The data in the status register is constantly updated, so

each repeating sequence will output new data.

Ready/busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is

not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy

state. There are many operations that can cause the device to be in a busy state: Main Memory

Page to Buffer Transfer, Buffer to Main Memory Page Program with Built-in Erase, Buffer to