18

3387L–DFLASH–6/06

AT45DB321C

Note:

1. Legacy Opcodes 52H, 54H, 56H, 57H, and 68H are still supported for reasons of backward compatibility only and are not

recommended for new designs. The inactive clock polarity high or low modes will not be supported in the future products.

Table 9-1.

Read Commands

Command

SCK Mode

Opcode

Continuous Array Read

RapidS Mode 0 or 3

E8H

Inactive Clock Polarity Low or High

68H

Main Memory Page Read

RapidS Mode 0 or 3

D2H

Inactive Clock Polarity Low or High

52H

Buffer 1 Read

RapidS Mode 0 or 3

D4H

Inactive Clock Polarity Low or High

54H

Buffer 2 Read

RapidS Mode 0 or 3

D6H

Inactive Clock Polarity Low or High

56H

Status Register Read

RapidS Mode 0 or 3

D7H

Inactive Clock Polarity Low or High

57H

Manufacturer and Device ID

RapidS Mode 0 or 3

9FH

Table 9-2.

Program and Erase Commands

Command

SCK Mode

Opcode

Buffer 1 Write

Mode 0, Mode 3

84H

Buffer 2 Write

Mode 0, Mode 3

87H

Buffer 1 to Main Memory Page Program with Built-in Erase

Mode 0, Mode 3

83H

Buffer 2 to Main Memory Page Program with Built-in Erase

Mode 0, Mode 3

86H

Buffer 1 to Main Memory Page Program without Built-in Erase

Mode 0, Mode 3

88H

Buffer 2 to Main Memory Page Program without Built-in Erase

Mode 0, Mode 3

89H

Page Erase

Mode 0, Mode 3

81H

Block Erase

Mode 0, Mode 3

50H

Main Memory Page Program Through Buffer 1

Mode 0, Mode 3

82H

Main Memory Page Program Through Buffer 2

Mode 0, Mode 3

85H