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AT89LP213 数据表(PDF) 74 Page - ATMEL Corporation |
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AT89LP213 数据表(HTML) 74 Page - ATMEL Corporation |
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74 / 90 page  74 3538A–MICRO–7/06 AT89LP213/214 [Preliminary] 23.8.5 Serial Peripheral Interface The Serial Peripheral Interface (SPI) is a byte-oriented full duplex synchronous serial communi- cation channel. During In-System programming the programmer always acts as the SPI master and the target device always acts as the SPI slave. The target device receives serial data on MOSI and outputs serial data on MISO. The Programming Interface implements a standard SPI Port with a fixed data order and For In-System programming, bytes are transferred MSB first as shown in Figure 23-9. The SCK phase and polarity follow SPI clock mode 0 (CPOL = 0, CPHA = 0) where bits are sampled on the rising edge of SCK and output on the falling edge of SCK. For more detailed timing information see Figure 23-10. Figure 23-9. ISP Byte Sequence Figure 23-10. Serial Programming Interface Timing 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0 0 MOSI MISO SCK Data Sampled tSR tSSE tSLSH tSOV tSF tSOX tSSD tSCK tSHSL tSOE tSOH tSIH tSIS SS SCK MISO MOSI |
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