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T89C51RD2-RDTIL 数据表(PDF) 78 Page - ATMEL Corporation

部件名 T89C51RD2-RDTIL
功能描述  0 to 40 MHz Flash Programmable 8-bit Microcontroller
PDF  104 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

T89C51RD2-RDTIL 数据表(HTML) 78 Page - ATMEL Corporation

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T89C51RD2
4243G–8051–05/03
Programming Algorithm
To program the T89C51RD2 the following sequence must be exercised:
•
Check the signature bytes
•
Check the HSB (VSB mode)
If the security bits are activated, the following commands must be done before
programming:
•
Unlock test modes (PEULCK mode, pulse 55h and AAh)
•
Chip erase (CERR mode)
•
Write FFh in the HSB (PGMS mode)
•
Write the signature bytes content in the XAF
•
As the boot loader and the XAF content is lost after a "chip erase", it must be
reprogrammed if needed.
•
Disable programming access (PELCK mode)
To write a page in the Flash memory, execute the following steps:
•
Step 0: Enable programming access (PEULCK mode)
•
Step 1: Activate the combination of control signals (PGML mode)
•
Step 2: Input the valid address on the address lines (High order bits of the address
must be stable during the complete ALE low time)
•
Step 3: Activate the combination of control signals (PGML mode)
•
Step 4: Input the appropriate data on the data lines.
•
Step 5: Pulse ALE/PROG once.
Repeat step 2 through 5 changing the address and data for end of a 128 bytes page
•
Step 6: Enable programming access (PEULCK mode)
•
Step 7: Activate the combination of control signals (PGMC mode)
•
Step 8: Input the valid address on the address lines.
•
Step 9: Pulse ALE/PROG once the specified write time is reached.
Repeat step 0 through 9 changing the address and data until the entire array or until the
end of the object file is reached (See Figure 32.)
•
Step 10: Disable programming access (PELCK mode)
Verify Algorithm
Verify must be done after each byte or block of bytes is programmed. In either case, a
complete verify of the programmed array will ensure reliable programming of the
T89C51RD2.
P 2.7 is used to enable data output.
To verify the T89C51RD2 code the following sequence must be exercised:
•
Step 1:Activate the combination of program and control signals (PGMV)
•
Step 2: Input the valid address on the address lines.
•
Step 3: Read data on the data lines.
Repeat step 2 through 3 changing the address for the entire array verification
(See Figure 32.).



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