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T89C51RD2-RDTIL 数据表(PDF) 93 Page - ATMEL Corporation |
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T89C51RD2-RDTIL 数据表(HTML) 93 Page - ATMEL Corporation |
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93 / 104 page ![]() 93 T89C51RD2 4243G–8051–05/03 AC inputs during testing are driven at V CC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at V IH min for a logic “1” and VIL max for a logic “0”. Float Waveforms For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded V OH/VOL level occurs. I OL/IOH ≥ ± 20mA. FLOAT V OH - 0.1 V VOL + 0.1 V V LOAD V LOAD + 0.1 V VLOAD - 0.1 V |
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