T89C51RD2-RDTIM datasheet(75/104 Pages) ATMEL

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T89C51RD2

4243G–8051–05/03

Flash Parallel

Programming

Signature Bytes

Four hardware read only registers have to be accessed with parallel static test modes

(mode TMS) in order to control the Flash parallel programmimg:

•

Manufacturer code

•

Device ID # 1: Family code

•

Device ID # 2: Memories size and type

•

Device ID # 3: Name and revision

As these registers can only be accessed by hardware, they must be read by the parallel

programmers and then copied in the XAF in order to make their values accessible by

software (ISP or API).

Set-up modes Configuration

In order to program and verify the Flash or to read the signature bytes, the T89C51RD2

is placed in specific set-up modes. (See Figure 31.)

Figure 31. Set-Up Modes Configuration

Definition of Terms

Address Lines:P1.0-P1.7, P2.0-P2.5, P3.4-P3.5, respectively for A0-A15.

Data Lines:P0.0-P0.7 for D0-D7

Control Signals:RST, PSEN, P2.6, P2.7, P3.2, P3.3, P3.6, P3.7.

Program Signals: ALE/PROG, EA

+5V

VCC

P0.0-P0.7

P1.0-P1.7

P2.0-P2.5

VSS

GND

D0-D7

A0-A7

A8-A13

RST

ALE/PROG

PSEN

P2.6

P2.7

P3.3

P3.7

P3.6

XTAL1

4 to 6 MHz

CONTROL

SIGNALS*

PROGRAM

SIGNALS*

P3.4

A14

P3.5

A15

T89C51RD2-RDTIM 数据表(PDF) 75 Page - ATMEL Corporation

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