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T89C51RD2-RDTIM 数据表(PDF) 76 Page - ATMEL Corporation |
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T89C51RD2-RDTIM 数据表(HTML) 76 Page - ATMEL Corporation |
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76 / 104 page  76 T89C51RD2 4243G–8051–05/03 Set-up modes configuration Control and program signals must be held at the levels indicated in the two following tables. Mode Name Mode Rst Psen Ale _ _ |_| EA P2.6 P2.7 P3.6 P3.7 P0[7..0] PELCK Program or Erase Lock. Disable the Erasure or Programming access 10 _ _ |_| 11010 xx PEULCK Program or Erase UnLock. Enable the Erasure or Programming access 1 0 Note 2 1 1010 55-AA PGMC Write Code Data (byte) or write Page Always precedeed by PGML 10 _ _ |_| Internally timed 10111 xx PGML Memory Page Load (up to 128 bytes) 1 0 Note 1 1 0101 Din PGMV Read Code Data (byte) 1 0 1 1 0 _ _ |_| 1 1 Dout VSB Read Security Byte (=HSB) 1 0 1 1 0 _ _ |_| 0 1 Dout PGMS Write Security Byte (Note 3) (security byte = HSB) 1 0 10 ms 11100 Din CERR Chip Erase User + XAF 1 0 100 ms 1 1 0 0 0 xx PGXC Write Byte or Page in Extra Memory (XAF) Always precedeed by PGXL 10 _ _ |_| Internally timed 11101 xx PGXL Memory Page Load XAF (up to 128 bytes) 1 0 Note 1 1 1101 Din TMS Read Signature bytes 30h (Manufacturer code) 31h (Device ID #1) 60h (Device ID #2) 61h (Device ID #3) 10 1 1 0 _ _ |_| 0 0 Dout = 58h D7h FCh FFh RXAF Read Extra Memory (XAF) 1 0 1 1 0 _ _ |_| 0 0 Dout |
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