T89C51RD2-RDTIM datasheet(42/104 Pages) ATMEL

42 / 104 page

T89C51RD2

4243G–8051–05/03

Power Management

Two power reduction modes are implemented in the T89C51RD2: the Idle mode and the

Power-down mode. These modes are detailed in the following sections. In addition to

these power reduction modes, the clocks of the core and peripherals can be dynamically

divided by 2 using the X2 mode detailed in Section “X2 Feature”.

Reset

In order to start-up (cold reset) or to restart (warm reset) properly the microcontroller, an

high level has to be applied on the RST pin. A bad level leads to a wrong initialization of

the internal registers like SFRs, Program Counter… and to unpredictable behavior of

the microcontroller. A proper device reset initializes the T89C51RD2 and vectors the

CPU to address 0000h. RST input has a pull-down resistor allowing power-on reset by

simply connecting an external capacitor to V

DD as shown in Figure 17. A warm reset can

be applied either directly on the RST pin or indirectly by an internal reset source such as

the watchdog timer. Resistor value and input characteristics are discussed in the Sec-

tion “DC Characteristics” of the T89C51RD2 datasheet.

Figure 17. Reset Circuitry and Power-On Reset

Cold Reset

2 conditions are required before enabling a CPU start-up:

•

DD must reach the specified VDD range

•

The level on X1 input pin must be outside the specification (V

IH, VIL)

If one of these 2 conditions are not met, the microcontroller does not start correctly and

can execute an instruction fetch from anywhere in the program space. An active level

applied on the RST pin must be maintained till both of the above conditions are met. A

reset is active when the level V

IH1 is reached and when the pulse width covers the

period of time where V

DD and the oscillator are not stabilized. 2 parameters have to be

taken into account to determine the reset pulse width:

•

DD rise time,

•

Oscillator startup time.

To determine the capacitor value to implement, the highest value of these 2 parameters

has to be chosen. Table 26 gives some capacitor values examples for a minimum R

RST

of 50 K

Ω and different oscillator startup and V

DD rise times.

RST

VSS

To CPU Core

and Peripherals

RST

VDD

Power-on Reset

RST input circuitry

VDD

From Internal

Reset Source

T89C51RD2-RDTIM 数据表(PDF) 42 Page - ATMEL Corporation

T89C51RD2-RDTIM 数据表(HTML) 42 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载