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CC1110-RTY1 数据表(PDF) 39 Page - Texas Instruments |
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CC1110-RTY1 数据表(HTML) 39 Page - Texas Instruments |
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39 / 203 page  CC1110 CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A Page 39 of 202 Register name SFR Address Module Description U1CSR 0xF8 USART1 USART 1 Control and Status U1DBUF 0xF9 USART1 USART 1 Receive/Transmit Data Buffer U1BAUD 0xFA USART1 USART 1 Baud Rate Control U1UCR 0xFB USART1 USART 1 UART Control U1GCR 0xFC USART1 USART 1 Generic Control WDCTL 0xC9 WDT Watchdog Timer Control 12.5 CPU Registers This section describes the internal registers used by the CPU. 12.5.1 Registers R0-R7 The CC1110 provides four register banks of eight registers each. These register banks are mapped in the DATA memory space at addresses 0x00-0x07, 0x08-0x0F, 0x10-0x17 and 0x18-0x1F. Each register bank contains the eight 8-bit register R0-R7. The register bank to be used is selected through the Program Status Word PSW.RS[1:0]. 12.5.2 Program Status Word The Program Status Word (PSW) contains several bits that show the current state of the CPU. The Program Status Word is accessible as an SFR and it is bit-addressable. PSW contains the Carry flag, Auxiliary Carry flag for BCD operations, Register Select bits, Overflow flag and Parity flag. Two bits in PSW are uncommitted and can be used as user-defined status flags . |
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