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CC1110-RTY1 数据表(PDF) 96 Page - Texas Instruments |
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CC1110-RTY1 数据表(HTML) 96 Page - Texas Instruments |
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96 / 203 page  CC1110 CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A Page 96 of 202 0000h 1 - Set output on compare 2 - Clear output on compare 3 - Toggle output on compare 6 - Clear when T1CC0, set when T1CCn 7 - Set when T1CC0, clear when T1CCn T1CCn T1CCn T1CC0 T1CC0 T1CC0 T1CCn 4 - Set output on compare-up, clear on compare-down 5 - Clear output on compare-up, set on compare-down T1CCn T1CCn Figure 18: Output modes, timer up/down mode 13.3.9 Timer 1 Interrupts There is one interrupt vector assigned to the timer. An interrupt request is generated when one of the following timer events occur: • Counter reaches terminal count value. • Input capture event. • Output compare event The register bits T1CTL.OVFIF, T1CTL.CH0IF, T1CTL.CH1IF, and T1CTL.CH2IF contains the interrupt flags for the terminal count value event, and the three channel compare/capture events, respectively. An interrupt request is only generated when the corresponding interrupt mask bit is set. The interrupt mask bits are T1CCTL0.IM, T1CCTL1.IM, T1CCTL2.IM and |
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