CC1110-RTY1 datasheet(54/203 Pages) TI

54 / 203 page

CC1110

CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A

Page 54 of 202

IP1 (0xB9) – Interrupt Priority 1

Bit

Name

Reset

R/W

Description

7:6

R/W

Not used.

IP1_5

R/W

Interrupt group 5, priority control bit 1, refer to Table 30

IP1_4

R/W

Interrupt group 4, priority control bit 1, refer to Table 30

IP1_3

R/W

Interrupt group 3, priority control bit 1, refer to Table 30

IP1_2

R/W

Interrupt group 2, priority control bit 1, refer to Table 30

IP1_1

R/W

Interrupt group 1, priority control bit 1, refer to Table 30

IP1_0

R/W

Interrupt group 0, priority control bit 1, refer to Table 30

IP0 (0xA9) – Interrupt Priority 0

Bit

Name

Reset

R/W

Description

7:6

R/W

Not used.

IP0_5

R/W

Interrupt group 5, priority control bit 0, refer to Table 30

IP0_4

R/W

Interrupt group 4, priority control bit 0, refer to Table 30

IP0_3

R/W

Interrupt group 3, priority control bit 0, refer to Table 30

IP0_2

R/W

Interrupt group 2, priority control bit 0, refer to Table 30

IP0_1

R/W

Interrupt group 1, priority control bit 0, refer to Table 30

IP0_0

R/W

Interrupt group 0, priority control bit 0, refer to Table 30

IP1_x

IP0_x

Priority Level

0 – lowest

3 – highest

Table 30: Priority Level Setting

Group

Interrupts

IP0

RFTXRX

DMA

IP1

ADC

IP2

URX0

UTX0

IP3

URX1

UTX1

IP4

ENC

P1INT

IP5

WDT

P0INT

Table 31: Interrupt Priority Groups

CC1110-RTY1 数据表(PDF) 54 Page - Texas Instruments

CC1110-RTY1 数据表(HTML) 54 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载