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CC1110-RTY1 数据表(PDF) 146 Page - Texas Instruments |
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CC1110-RTY1 数据表(HTML) 146 Page - Texas Instruments |
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146 / 203 page ![]() CC1110 CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A Page 146 of 202 U1GCR (0xFC) – USART 1 Generic Control Bit Name Reset R/W Description SPI clock polarity 0 Negative clock polarity 7 CPOL 0 R/W 1 Positive clock polarity SPI clock phase 0 Data is output on MOSI when SCK goes from CPOL inverted to CPOL, and data input is sampled on MISO when SCK goes from CPOL to CPOL inverted. 6 CPHA 0 R/W 1 Data is output on MOSI when SCK goes from CPOL to CPOL inverted, and data input is sampled on MISO when SCK goes from CPOL inverted to CPOL. Bit order for transfers 0 LSB first 5 ORDER 0 R/W 1 MSB first 4:0 BAUD_E[4:0] 0x00 R/W Baud rate exponent value. BAUD_E along with BAUD_M decides the UART baud rate and the SPI master SCK clock frequency U1DBUF (0xF9) – USART 1 Receive/Transmit Data Buffer Bit Name Reset R/W Description 7:0 DATA[7:0] 0x00 R/W USART receive and transmit data. When writing this register the data written is written to the internal transmit data register. When reading this register, the data from the internal read data register is read. U1BAUD (0xFA) – USART 1 Baud Rate Control Bit Name Reset R/W Description 7:0 BAUD_M[7:0] 0x00 R/W Baud rate mantissa value. BAUD_E along with BAUD_M decides the UART baud rate and the SPI master SCK clock frequency |
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