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CC1110-RTY1 数据表(PDF) 194 Page - Texas Instruments |
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CC1110-RTY1 数据表(HTML) 194 Page - Texas Instruments |
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194 / 203 page ![]() CC1110 CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A Page 194 of 202 GDO0_CFG[5:0] GDO1_CFG[5:0] GDO2_CFG[5:0] Description 0-7 Not in use 8 Preamble Quality Reached. Asserts when the PQI is above the programmed PQT value. 9 Clear channel assessment. High when RSSI level is below threshold (dependent on the current CCA_MODE setting) 10 Lock detector output 11 Serial Clock. Synchronous to the data in synchronous serial mode. Data is set up on the falling edge and is read on the rising edge of SERIAL_CLK. 12 Serial Synchronous Data Output. Used for synchronous serial mode. The MCU must read DO on the rising edge of SERIAL_CLK. Data is set up on the falling edge by CC1100. 13 Serial transparent Data Output. Used for asynchronous serial mode. 14 Carrier sense. High if RSSI level is above threshold. 15 CRC OK. The last CRC comparison matched. Cleared when entering/restarting RX mode. 16 ADC I/Q – serialized 17 Decimation filter output I/Q + channel filter I/Q + CORDIC + GAIN 18 Demodulator backend key signals (PSK) 19 Demodulator backend key signals (FSK) 20 Data filter output 21 Not in use 22 RX_HARD_DATA[1] 23 RX_HARD_DATA[0] 24 FPLL 25 CLK_PRE 26 VCO_CURR_COMP 27 PA_PD 28 LNA_PD 29 RX_SYMBOL_TICK 30-46 Not in use 47 Hard-wired to 0 (hard-wired to 1 achieved with inverted polarity selected on output test signal) 48-63 Not in use Table 52: Debug output signals |
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