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ADA4351-2ACPZ-R7 数据表(PDF) 29 Page - Analog Devices |
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ADA4351-2ACPZ-R7 数据表(HTML) 29 Page - Analog Devices |
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29 / 36 page ![]() Data Sheet ADA4351-2 APPLICATIONS INFORMATION analog.com Rev. 0 | 29 of 36 Figure 88. Loop Gain Elements and Closed-Loop Transimpedance Frequency Response for the Overcompensated Response in Figure 86 The noise gain here intersects the ADA4351-2 AOL curve at about 1.1 MHz, where the loop gain is at the 0 dB crossover with the loop-gain phase curve showing a stable 71° phase margin in Figure 89. Higher frequency poles in the ADA4351-2 open-loop response reduce this phase margin slightly but still yield a stable design. Figure 89. Loop Gain Magnitude and Phase for the Design of Figure 88 Generally, a good starting point for a design is to set the feedback pole as shown in Equation 2, which is in Hertz. Setting the feedback pole, P1, at 0.707 × f0 yields an approximate Butterworth response, giving a maximally flat closed-loop response with only 4% step response overshoot. P1= 12πRFCF= GBP4πRFCS=f02 (2) If P1 is set as shown in Equation 2, the closed-loop transimpedance response has a f−3dB ≈ f0. Example Transimpedance Design for Higher Gain, Lower Bandwidth Re-executing the design shown in Figure 86 for a higher gain, and setting P1 to approximate a Butterworth closed-loop design, results in the design shown in Figure 90. Figure 90. Higher Gain, Lower Bandwidth Butterworth Design Example with CD = 50 pF This simplified design equation is effective when CS > 5 × CF, as it is here. Under those conditions, the approximate zero, Z1, is 1/(2π × 200 kΩ × 55.4 pF) = 14.4 kHz (note that this is neglecting CF in the Z1 equation shown in Figure 87). The characteristic frequency is approximately the following: f0= GBP×Z1= 8.5 MHz × 14.4 kHz =348 kHz (3) The feedback pole is placed at 0.707 × f0 = 246 kHz, and the resulting f−3 dB must be near 350 kHz = f0. Rerunning the loop gain and response shape curves for the updated design of Figure 90 gives a close fit as shown in Figure 91 with an f−3 dB = 340 kHz showing a flat Butterworth response. The required feedback capacitor in this example is largely the internal 3 pF (CF, INT), where that 0.2 pF externally across the 200 kΩ feedback shown in Figure 90 is approximately the parasitic capacitance for a surface-mount resistor. Figure 91. Redesigned TIA Design for a RF = 200 kΩ Butterworth Response with CD = 50 pF |
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