May 9, 2006 22143C7

Am29PL160C

35

D A TA

SH EE T

AC CHARACTERISTICS

Note: VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read

cycle, and array data read cycle

Figure 18.

Toggle Bit Timings (During Embedded Algorithms)

WE#

CE#

OE#

High Z

DQ6/DQ2

Addresses

VA

VA

VA

Valid Data

Valid Status

Valid Status

(first read)

(second read)

(stops toggling)

Valid Status

VA

Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an

erase-suspended sector.

Figure 19.

DQ2 vs. DQ6 for Erase and

Erase Suspend Operations

Enter

Erase

Erase

Erase

Enter Erase

Suspend Program

Erase Suspend

Read

Erase Suspend

Read

Erase

WE#

DQ6

DQ2

Erase

Complete

Erase

Suspend

Suspend

Program

Resume

Embedded

Erasing