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PCF5083H/001/F2 数据表(PDF) 18 Page - NXP Semiconductors |
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PCF5083H/001/F2 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 136 page  1996 Oct 29 18 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 8.2.2 MOBILE SWITCH-OFF PROCEDURE The switch-off request to the System Controller is initiated via a LOW-to-HIGH transition and hold of pin ONKEY for longer than 1 second or a LOW level on pin LOWVOLT. The HWCTRL_INT interrupt is activated if one of these conditions has set it’s corresponding flag in register HWCTRL_REG. The next step is to deactivate the POWON signal. Therefore the flag HWCTRL_REG[SWOFF] has to be set. If the SWOFF flag is not set within 8 seconds (see Section 8.2.3) and the Watchdog Timer expires, POWON is deactivated without any further interaction. The SWOFF flag is automatically cleared when the mobile is switched on again. The PCF5083 is immediately and under all conditions forced into the off state with RSTO asserted LOW. Table 6 Mobile switch-off request conditions ONKEY LOWVOLT COMB_INT HH H L ¡ HX H ¡ L XH ¡ LH ¡ L It should be noted that: • If POWON is LOW (switch-off state), all outputs of the PCF5083 except POWON and NPOWON are in their high-impedance state. • The hardware control interrupt (HWCTRL_INT) is not asserted externally but stays internally pending during Sleep mode. The timing generator unit is forced into wake-up state if the hardware control interrupt is asserted internally. • Other interrupt conditions, caused by the MMI power-down unit and the real time clock unit, are also indicated with the hardware control interrupt. These conditions are mentioned in the appropriate sections. • The interrupt flags in register HWCTRL_REG have to be cleared by the System Controller to deactivate the interrupt condition. A flag is cleared by writing a logic 1 to its bit location. Table 7 Mobile switch-off conditions HWCTRL_REG[SWOFF] OFF/WATCHDOG TIMER EXPIRES RSTO POWON Lno H H L ¡ Hno H H ¡ L L yes H H ¡ L XX L H ¡ L |
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