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PCF5083H/001/F2 数据表(PDF) 28 Page - NXP Semiconductors

部件名 PCF5083H/001/F2
功能描述  GSM signal processing IC
PDF  136 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCF5083H/001/F2 数据表(HTML) 28 Page - NXP Semiconductors

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1996 Oct 29
28
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
8.3.2.8
Timing modes Application Examples
Table 14 Timing mode applications
Note
1. The SYNC burst location is defined by MONSTART_REG. If a timing is required with s = MONSTART_REG
≥ 5000,
MONSTART_REG is programmed with s mod 5000 and the second alternative is used.
FRAME
43
2
1
0
BIT ASSIGNMENT;
REGISTER MODE_REG
SEND
RECON RECMON RECTX
RECRX
ACTION
BCCH Detection
N
0
1
0
0
0
Receiver on at the start of timeslot 0
(MONSTART_REG = 0) in TDMA frame N + 1.
Receiver on.
N + 1 to N + M
0
0
0
0
0
Keep receiver on.
N + 1 + M
0
0
1
0
0
Receiver off after number of samples defined
by MONSTART_REG, RXLENGTHx_REG and
number of TDMA frames M.
Frequency Estimation
X
0
0
0
0
1
Receive during TS0.
Frame with RX, TX, MON
X
1
0
1
0
1
Receive during RX, MON, transmit during TX.
Frame before idle frame (monitoring)
I-1
1
1
0
0
1
Receive during RX, transmit during TX, receiver
on defined by MONSTART_REG.
Idle frame (monitoring)
I
0
0
1
0
0
Receiver off defined by MONSTART_REG and
RXLENGTHx_REG.
Frame with RX, TX, MON
I-1
or(1)
1
0
1
0
1
Receive during RX, MON, transmit during T.
I-1
1
0
0
0
1
Receive during RX, transmit during TX.
Idle frame (SYNC burst reading)
I
or(1)
0
0
0
0
0
No operation.
I
0
0
1
0
0
Receive during MON.
Three level measurements
X
0
0
1
1
1
Receive during RX, TX and MON slot.
Send access burst
X
1
0
0
0
0
Transmit during TX.



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