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PCF8548U/2 数据表(PDF) 17 Page - NXP Semiconductors |
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PCF8548U/2 数据表(HTML) 17 Page - NXP Semiconductors |
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17 / 40 page ![]() 1999 Aug 16 17 Philips Semiconductors Product specification 65 × 102 pixels matrix LCD driver PCF8548 Table 2 Explanations of symbols in Table 1 12.1 External reset (RES) After power-on a reset pulse must be applied immediately to the chip, as it is in an undefined state. A reset of the chip can be achieved using the external reset pad. After the reset the LCD driver is set to the following states: • Power-down mode (PD = 1) • All LCD outputs at VSS (display off) • Horizontal addressing (V = 0) • Normal instruction set (H = 0) • Normal display (MX = MY = TRS = BRS = 0) • Display blank (E = D = 0) • Address counter X[6:0] = 0 and Y[3:0] = 0 • Temperature coefficient (TC[1:0] = 0) • Bias system (BS[2:0] = 0) • VLCD is equal to 0, the HV generator is switched off (Vop[6:0] = 0 and PRS = 0) • After power-on (RAM data is undefined), the reset signal does not change the content of the RAM. BIT 0 1 RESET STATE PD chip is active chip is in Power-down mode 1 V horizontal addressing vertical addressing 0 H use basic instruction set use extended instruction set 0 MX normal X addressing X address is mirrored 0 MY display is not vertically mirrored display is vertically mirrored 0 TRS top rows are not mirrored top rows are mirrored 0 BRS bottom rows are not mirrored bottom rows are mirrored 0 DO MSB is on top LSB is on top 0 PRS VLCD programming range LOW VLCD programming range HIGH 0 D and E 00 display blank D = 0 E=0 10 normal mode 01 all display segments on 11 inverse video mode TC[1:0] 00 VLCD temperature coefficient 0 TC[1:0] = 00 01 VLCD temperature coefficient 1 10 VLCD temperature coefficient 2 11 VLCD temperature coefficient 3 S[1:0] 00 2 × voltage multiplier S[1:0] = 00 01 3 × voltage multiplier 10 4 × voltage multiplier 11 5 × voltage multiplier BS[2:0] bias system BS[2:0] = 000 Vop[6:0] VLCD programming Vop[6:0] = 0000000 |
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