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TMF8801 数据表(PDF) 23 Page - OSRAM GmbH

部件名 TMF8801
功能描述  Time-of-Flight Sensor
PDF  73 Pages
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制造商  OSRAM [OSRAM GmbH]
网页  http://www.osram.com
标志 OSRAM - OSRAM GmbH

TMF8801 数据表(HTML) 23 Page - OSRAM GmbH

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TMF8801
Register Description
Datasheet
• PUBLIC
DS000648
• v10-00 • 2022-Dec-20
72
│ 22
8.4
ENABLE Register (Address 0xE0)
Figure 24:
ENABLE Register
Addr: 0xE0
ENABLE
Field
Name
Rst
Type
Description
7
cpu_reset
0
RW_SC
Write a '1' here to reset CPU. This generates global
reset, fully resetting CPU and all CPU registers. The bit
resets itself, no need to explicitly clear it.
6
cpu_ready
0
RO
CPU is ready to handle I²C - if this bit is zero, then only
the registers 0xe0 and above are usable, the memory
mapped I²C space is not used.
Bit gets set only explicitly by software, therefore a
functional and running firmware is necessary for this bit
to work.
0
pon
1
R_PUSH
1=Activate oscillator 0=Ask cpu to go to standby
Activating the oscillator is implemented in hardware.
Whenever this register is '0' and a '1' is being written,
the oscillator is being started and CPU receives a
PON1 interrupt. It is implemented in the bootloader to
execute a reset at this point, but the application goes to
an IDLE state.
De-activating the oscillator is a software assisted
process. It is important that the CPU powers down all
modules properly before turning off the oscillator,
therefore this is implemented in firmware. So writing a
'0' to this register will trigger an internal CPU interrupt.
The firmware, after powering down everything, sets the
device into standby state.
8.5
INT_STATUS Register (Address 0xE1)
Figure 25:
INT_STATUS Register
Addr: 0xE1
INT_STATUS
Field
Name
Rst
Type
Description
1
int2
0
R_PUSH1
Raw histogram available interrupt for App0; asserted
when a raw histogram can be retrieved from I²C.
int2 status. If bis is asserted, and int2_enab is asserted
as well, then the INT pin will be pulled low. Writing a '1'
here will clear int1 condition.



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