DATA SHEET

SE4150L: GPS Receiver IC

Preliminary Datasheet

Skyworks Solutions, Inc.

• Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

202445B • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 1, 2019

16

Logic Timing Characteristics

Conditions: CL ≤ 15pF, VCC = VDDN = 3.3 V, TA = 25°C at Maximum Buffer Current

Symbol

Parameter

Note

Min.

Typ.

Max.

Unit

tPER

Clock Period

-

-

61.09

-

ns

tPWL

Clock Low Width

1

10

-

-

ns

tPWH

Clock High Width

1

10

-

-

ns

tDEL

Clock To Data Delay Time

2

-

-

12

ns

tSETUP

Setup Time (CLK_OUT = 16.368 MHz)

1

7

-

-

ns

tHOLD

Hold Time

-

10

-

-

ns

tR

Rise Time, 10-90%

1

-

-

17

ns

tR/F

Rise and Fall Time, 10 - 90%

1

-

-

17

ns

Note:

(1)

Values dependent on output drive set.

(2)

Maximum values dependent on load capacitance and output drive current level; determined by

current-setting resistor connected between VCC and RVI (pin 12).

Logic Output Data Timing Diagram

tR(10-90%)

tDEL

tSETUP

tHOLD

tR/F(10-90%)

tPER

tPWH

tPWL

CLK_OUT

SIGN, MAG

Conditions:

(1) Capacitive load on SIGN, MAG and CLK_OUT ≤ 15pF

(2) Output drive set to Maximum: RVI (pin 12) directly connected to Vcc