MPC8541ECVTAPE datasheet(55/84 Pages) FREESCALE

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MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

Package and Pin Listings

3. Maximum solder ball diameter measured parallel to datum A.

4. Datum A, the seating plane, is defined by the spherical crowns of the solder balls.

5. Capacitors may not be present on all devices.

6. Caution must be taken not to short capacitors or exposed metal capacitor pads on package top.

7. The socket lid must always be oriented to A1.

14.3

Pinout Listings

Table 43 provides the pin-out listing for the MPC8541E, 783 FC-PBGA package.

Table 43. MPC8541E Pinout Listing

Signal

Package Pin Number

Pin Type

Power

Supply

Notes

PCI1 and PCI2 (one 64-bit or two 32-bit)

PCI1_AD[63:32],

PCI2_AD[31:0]

AA14, AB14, AC14, AD14, AE14, AF14, AG14, AH14,

V15, W15, Y15, AA15, AB15, AC15, AD15, AG15,

AH15, V16, W16, AB16, AC16, AD16, AE16, AF16,

V17, W17, Y17, AA17, AB17, AE17, AF17, AF18

I/O

OVDD

PCI1_AD[31:0]

AH6, AD7, AE7, AH7, AB8, AC8, AF8, AG8, AD9,

AE9, AF9, AG9, AH9, W10, Y10, AA10, AE11, AF11,

AG11, AH11, V12, W12, Y12, AB12, AD12, AE12,

AG12, AH12, V13, Y13, AB13, AC13

I/O

OVDD

PCI_C_BE64[7:4]

PCI2_C_BE[3:0]

AG13, AH13, V14, W14

I/O

OVDD

PCI_C_BE64[3:0]

PCI1_C_BE[3:0]

AH8, AB10, AD11, AC12

I/O

OVDD

PCI1_PAR

AA11

I/O

OVDD

PCI1_PAR64/PCI2_PAR

Y14

I/O

OVDD

PCI1_FRAME

AC10

I/O

OVDD

PCI1_TRDY

AG10

I/O

OVDD

PCI1_IRDY

AD10

I/O

OVDD

PCI1_STOP

V11

I/O

OVDD

PCI1_DEVSEL

AH10

I/O

OVDD

PCI1_IDSEL

AA9

OVDD

PCI1_REQ64/PCI2_FRAME

AE13

I/O

OVDD

5, 10

PCI1_ACK64/PCI2_DEVSEL AD13

I/O

OVDD

PCI1_PERR

W11

I/O

OVDD

PCI1_SERR

Y11

I/O

OVDD

2, 4

PCI1_REQ[0]

AF5

I/O

OVDD

PCI1_REQ[1:4]

AF3, AE4, AG4, AE5

OVDD

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