Philips Semiconductors

Objective specification

SA9024

900 MHz transmit modulator and 1.3 GHz

fractional–N synthesizer

1997 Aug 01

18

SR01440

RSA = “11”

RSA = “10”

RSA = “01”

RSA = “00”

RSM = “11”

RSM = “10”

RSM = “01”

RSM = “00”

MAIN SELECT

AUXILIARY SELECT

REFERENCE

INPUT

DIVIDE BY NREF

/2

/2

/2

Figure 8.

Reference Variable Divider

Phase Detectors (Figure 9)

The auxiliary and main phase detectors each consist of a 2 D-type

flip-flop phase and frequency detector. Each flip-flop is set by the

negative edge of the divider terminal count output pulse. The reset

inputs are activated after a delay when both flip-flops have been set.

This avoids non-linearity or dead-band around zero phase error.

The flip-flops drive on-chip charge pumps. A pull-up current from

the charge pump indicates the VCO frequency shall be increased

while a pull-down pulse indicates the VCO frequency shall be

decreased.

Current Settings

charge pump currents and the fractional compensation currents are

linearly dependent on the current in the current setting pins. This

Auxiliary Output Charge Pumps

The auxiliary charge pumps on pin PHA are driven by the auxiliary

phase detector and the current value is determined by the external

resistor attached to pin RN.