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DS20005164H-page 9

SST25WF080B

5.0

INSTRUCTIONS

Instructions are used to read, write (Erase and Pro-

gram), and configure the SST25WF080B devices. The

instruction bus cycles are 8 bits each for commands

(Op Code), data, and addresses. The Write Enable

(WREN) instruction must be executed prior to Sector

Erase, Block Erase, Page Program, Write STATUS

Register or Chip Erase instructions. The complete

instructions are provided in Table 5-1. All instructions

are synchronized off a high-to-low transition of CE#.

Inputs will be accepted on the rising edge of SCK start-

ing with the most significant bit. CE# must be driven low

before an instruction is entered and must be driven

high after the last bit of the instruction has been shifted

in (except for Read, Read-ID, and Read STATUS Reg-

ister instructions). Any low-to-high transition on CE#,

before receiving the last bit of an instruction bus cycle,

will terminate the instruction in progress and return the

device to standby mode. Instruction commands (Op

Code), addresses, and data are all input from the most

significant bit (MSb) first.

TABLE 5-1:

DEVICE OPERATION INSTRUCTIONS

Instruction

Description

Op Code Cycle(1)

Address

Cycle(s)(2)

Dummy

Cycle(s)

Data

Cycle(s)

Maximum

Frequency

Read

Read Memory

0000 0011b (03H)

3

0

1 to



30 MHz

Note 1: One bus cycle is eight clock periods.

2: Address bits above the most significant bit of each density can be VIL or VIH.

3: One bus cycle is four clock periods in Dual Operation

4: 4-Kbyte Sector Erase addresses: use AMS-A12, remaining addresses are “don’t care” but must be set

either at VIL or VIH.

5: 64-Kbyte Block Erase addresses: use AMS-A16, remaining addresses are “don’t care” but must be set

either at VIL or VIH.

6: The Read STATUS Register is continuous with ongoing clock cycles until terminated by a low-to-high tran-

sition on CE#.

7: Device ID is read after three dummy address bytes. The Device ID output stream is continuous until ter-

minated by a low-to-high transition on CE#.

8: The instructions Release from Deep Power down and Read-ID are similar instructions (ABH). Executing

Read-ID requires the ABH instruction, followed by 24 dummy address bits to retrieve the Device ID.

Release from Deep Power-Down only requires the instruction ABH.