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ADN4600ACPZ-R7 数据表(PDF) 27 Page - Analog Devices |
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ADN4600ACPZ-R7 数据表(HTML) 27 Page - Analog Devices |
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27 / 28 page ![]() Data Sheet ADN4600 Rev. C | Page 27 of 28 Addr (Hex) Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default 0xD1 TX2 Output Level Control 1 TX2 CTL SRC TX2_OLEV1[6:0] 0x40 0xD2 TX2 Output Level Control 0 TX2_OLEV0[6:0] 0x40 0xD3 TX2 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF 0xD9 TX3 Output Level Control 1 TX3 CTL SRC TX3_OLEV1[6:0] 0x40 0xDA TX3 Output Level Control 0 TX3_OLEV0[6:0] 0x40 0xDB TX3 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF 0xE1 TX7 Output Level Control 1 TX7 CTL SRC TX7_OLEV1[6:0] 0x40 0xE2 TX7 Output Level Control 0 TX7_OLEV0[6:0] 0x40 0xE3 TX7 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF 0xE9 TX6 Output Level Control 1 TX6 CTL SRC TX6_OLEV1[6:0] 0x40 0xEA TX6 Output Level Control 0 TX6_OLEV0[6:0] 0x40 0xEB TX6 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF 0xF1 TX5 Output Level Control 1 TX5 CTL SRC TX5_OLEV1[6:0] 0x40 0xF2 TX5 Output Level Control 0 TX5_OLEV0[6:0] 0x40 0xF3 TX5 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF 0xF9 TX4 Output Level Control 1 TX4 CTL SRC TX4_OLEV1[6:0] 0x40 0xFA TX4 Output Level Control 0 TX4_OLEV0[6:0] 0x40 0xFB TX4 Squelch Control SQUELCHb[3:0] DISABLEb[3:0] 0xFF |
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