IP1202PBF datasheet(9/29 Pages) IRF

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iP1202PbF

Table 1: Pin Description

Pin Name

Ball Designator

Pin Description

VIN

A1 A2 A3 A4 A15 A16 A17 A18 B1 B2 B3 B4 B15 B16 B17

B18 C1 C2 C3 C4 C15 C16 C17 C18

Input voltage connection pins

CC1

Output of the first error amplifier

CC2

H13

Output of the second error amplifier

ENABLE

A8 B8

Single pin for both outputs. Commands ouputs ON or OFF. Normally

Pulled High. Pulled low, turns both outputs ON.

SS1

Soft start pin for output 1. External capacitor provides soft start.

Pulling soft start pin low will disable this output.

SS2

H11

Soft start pin for output 2. External capacitor provides soft start.

Pulling soft start pin low will disable this output.

FB1

Inverting input of error amplifier 1

FB1s

Output 1 overvoltage sense pin.

FB2

J13

Inverting input of error amplifier 2

FB2s

J11

Output 2 overvoltage sense pin.

VSW1

D1 D2 D3 E1 E2 F1 F2 G1 G2 H1 H2 J1 J2 K1 K2 L1 L2

Output 1 inductor connection pins

VSW2

D16 D17 D18 E17 E18 F17 F18 G17 G18 H17 H18 J17

J18 K17 K18 L17 L18

Output 2 inductor connection pins

PGND

A5 A6 A7 A9 A10 A12 A13 A14 B5 B6 B7 B10 B11 B12

B13 B14 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 D5 D6

D7 D8 D9 D10 D11 D12 D13 D14 E3 E4 E5 E6 E13 E14

E15 E16 F3 F4 F5 F6 F8 F9 F10 F11 F13 F14 F15 F16 G3

G4 G6 G9 G10 G13 G15 G16 H4 H9 H10 H15 J4 J5 J9

J10 J14 J15 K4 K5 K14 K15 L3 L4 L5 L13 L14 L15 L16

Power Ground pins

Vref

Amplifier 1 reference Voltage. Connect a 100pF cap from this pin to

PGND.

VP-ref

Amplifier 2 reference voltage. Connect to Vref for independent

output configuration. Refer to application notes on how to connect to

parallel configuration or output voltage tracking configurations.

SYNC

External Clock synchronization pin. Set free running frequency to

80% of the SYNC frequency. When not in use, leave pin floating

L11

Switching frequency setting pin. For RT selection, refer to Fig.9 of the

datasheet.

PGOOD

L10

Power Good pin. Open collector, requires external pulll-up. If

function not needed, pin can be left floating

HICCUP

Logic level pin. Pulled high enables hiccup mode of operation. Pulled

low enables latched overcurrent shutdown mode.

OCSET1

Overcurrent trip threshold pin for output 1

OCSET2

G11

Overcurrent trip threshold pin for output 2

IP1202PBF 数据表(PDF) 9 Page - International Rectifier

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