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DSPIC33FJ12MC02ESS 数据表(PDF) 139 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS 数据表(HTML) 139 Page - Microchip Technology |
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139 / 284 page ![]() © 2007 Microchip Technology Inc. Preliminary DS70265B-page 137 dsPIC33FJ12MC201/202 12.0 INPUT CAPTURE The input capture module is useful in applications requiring frequency (period) and pulse measurement. The dsPIC33FJ12MC201/202 devices support up to eight input capture channels. The input capture module captures the 16-bit value of the selected Time Base register when an event occurs at the ICx pin. The events that cause a capture event are listed below in three categories: 1. Simple Capture Event modes: - Capture timer value on every falling edge of input at ICx pin - Capture timer value on every rising edge of input at ICx pin 2. Capture timer value on every edge (rising and falling) 3. Prescaler Capture Event modes: - Capture timer value on every 4th rising edge of input at ICx pin - Capture timer value on every 16th rising edge of input at ICx pin Each input capture channel can select one of two 16-bit timers (Timer2 or Timer3) for the time base. The selected timer can use either an internal or external clock. Other operational features include: • Device wake-up from capture pin during CPU Sleep and Idle modes • Interrupt on input capture event • 4-word FIFO buffer for capture values - Interrupt optionally generated after 1, 2, 3 or 4 buffer locations are filled • Use of input capture to provide additional sources of external interrupts FIGURE 12-1: INPUT CAPTURE BLOCK DIAGRAM Note: This data sheet summarizes the features of the dsPIC33FJ12MC201/202 devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the “dsPIC33F Family Reference Manual”. Please see the Microchip web site (www.microchip.com) for the latest dsPIC33F Family Reference Manual chapters. ICxBUF ICx Pin ICM<2:0> (ICxCON<2:0>) Mode Select 3 10 Set Flag ICxIF (in IFSn Register) TMR2 TMR3 Edge Detection Logic 16 16 FIFO R/W Logic ICxI<1:0> ICOV, ICBNE (ICxCON<4:3>) ICxCON Interrupt Logic System Bus From 16-bit Timers ICTMR (ICxCON<7>) Prescaler Counter (1, 4, 16) and Clock Synchronizer Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel. |
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