ADA4098-1BUJZ-R5 datasheet(26/33 Pages) AD

26 / 33 page

Data Sheet

ADA4098-1/ADA4098-2

APPLICATIONS INFORMATION

analog.com

Rev. B | 26 of 33

GROUNDING

Use ground and power planes where possible to reduce the re-

sistance and inductance of the supply and ground returns. Place

bypass capacitors as close as possible to the ±VS supply pins, with

the other ends connected to the ground plane. It is recommended

to use a bypass capacitor of at least 0.1 µF when driving light

loads (load currents < 100 µA), and more capacitance when driving

heavier loads. Routing from the output to the load and return to the

ground plane must have minimal loop area to keep inductance to a

minimum.

ESD PROTECTION WHEN POWERED

ICs react to ESD strikes differently when unpowered vs. powered,

which falls under IEC-61000-4-2 standards (see the Absolute Max-

imum Ratings section). A device that performs well under HBM

conditions can perform poorly under International Electrotechnical

Commission (IEC) conditions. The ADA4098-1 and ADA4098-2

are thoroughly abused with ESD strikes under IEC conditions

to create a front-end circuit protection scheme that protects the

devices if subjected to ESD strikes. Figure 64 and Figure 65 show

two different protection schemes that extend the protection of the

ADA4098-1 and ADA4098-2 to ±8 kV ESD strikes.

Consider the following when selecting components:

►

A component size of 0805 or larger to reduce chance of arc-over.

►

Pulse withstanding, thick film resistors.

►

C0G MLCC with a minimum rating of 100 V.

►

Bidirectional, transient voltage suppression (TVS) diodes.

In the circuit shown in Figure 64, R1 is a 220 Ω, Panasonic, 0805,

ERJ-P6 series, and C1 is a 100 pF, Yageo, 0805, 100 V, C0G/NP0.

Figure 64. ESD Protection Circuit (RC Network)

In the circuit shown in Figure 65, R1 is a 220 Ω, Panasonic, 0805,

ERJ-P6 series, and D1 is a Bourns CDSOD323-T36SC. An ESD

varistor can be considered for D1.

Figure 65. ESD Protection Circuit (R-TVS Network)

For more information on system level ESD considerations, see the

technical article, When Good Electrons Go Bad: How to Protect

Your Analog Front End, on the Analog Devices, Inc., website.

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