数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADA4098-1BUJZ-R5 数据表(PDF) 22 Page - Analog Devices

部件名 ADA4098-1BUJZ-R5
功能描述  50 V, 1 MHz, 165 μA per Channel, Robust, Over-The-Top, Precision Op Amps
PDF  33 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4098-1BUJZ-R5 数据表(HTML) 22 Page - Analog Devices

Back Button ADA4098-1BUJZ-R5 Datasheet HTML 18Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 19Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 20Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 21Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 22Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 23Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 24Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 25Page - Analog Devices ADA4098-1BUJZ-R5 Datasheet HTML 26Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 33 page
background image
Data Sheet
ADA4098-1/ADA4098-2
THEORY OF OPERATION
analog.com
Rev. B | 22 of 33
noise. The singular benefit of this configuration is an increase in
closed-loop amplifier stability.
In normal mode (−VS < VCM < +VS −1.25 V), RIN is typically large
compared to the value of the gain setting resistors (RF and RI), and
RIN can be ignored.
In this case, the noise gain is defined by the following equation:
Noise Gain = 1 + RF/RI
When the amplifiers transition to Over-The-Top operation with the
input common-mode biased near or above the +VS supply, consider
the value of RIN.
The noise gain of the amplifiers increases as shown in the following
equation:
NoiseGainOTT= 1+ RF
RI RIN+RI RF
×
1+RI RFRIN
where Noise GainOTT is the Over-The-Top noise gain.
The dc closed-loop gain remains mostly unaffected (RF/RI). Howev-
er, the loop gain of the amplifiers decreases, as expressed in the
following equation:
AOL1+RFRIto AOL
NoiseGainOTT
Likewise, the closed-loop bandwidth (BWCLOSED_LOOP) of the ampli-
fiers changes going from normal operation to Over-The-Top opera-
tion.
In normal operation,
BWCLOSED_LOOP ≈
GBP
1+ RFRI
In Over-The-Top operation,
BWCLOSED_LOOP ≈
GBP
NoiseGainOTT
Output voltage noise density (eno) is impacted when the devices
transition from normal operation to Over-The-Top operation. Resis-
tor noise is neglected in both modes of operation in the following
equations.
In normal operation, neglecting resistor noise,
eno ≅ en1+ RFRI
where en is input referred voltage noise density.
In Over-The-Top operation, neglecting resistor noise,
eno ≅ en×NoiseGainOTT
OUTPUT
The output of the ADA4098-1 and ADA4098-2 can swing rail-to-rail
to within 45 mV of either supply with no load. The output can source
24 mA and sink 35 mA. The amplifiers are internally compensated
to drive at least 200 pF of CLOAD. Adding a series resistance of
50 Ω between the output and larger capacitive loads extends the
capacitive drive capability of the amplifiers.
If the ADA4098-1 and ADA4098-2 enter shutdown, the VOUT pin
appears as high impedance with two steering diodes connected to
either supply. In this state, the output typically leaks <5 nA.
SHUTDOWN PINS (SHDN AND SHDNX)
The ADA4098-1 and ADA4098-2 have dedicated shutdown pins
(SHDN for the ADA4098-1, and SHDN1 and SHDN2 for the
ADA4098-2 10-lead LFCSP) to place the amplifiers in a very low
power shutdown state when asserted high. A logic high is defined
by a voltage ≥1.5 V applied to the SHDN pin and SHDNx pins with
respect to the −VS pin. In shutdown, the amplifiers draw <12 μA of
supply current (see Figure 9) and the VOUT pin is placed in a high
impedance state.
The SHDN pin and SHDNx pins can be driven beyond the +VS
supply up to the absolute maximum voltage (60 V with respect to
−VS) and draw little current (<1.5 μA). For normal active amplifier
operation, the SHDN pin and SHDNx pins can be floated or driven
by an external low voltage source (within 0.5 V of −VS). If the
SHDN pin and SHDNx pins are left floating, an internal current
source (~600 nA) pulls the SHDN pin and SHDNx pins to –VS,
which places the amplifiers into a default, active amplifying state.
Because of the close proximity of the −IN pin (ADA4098-1) and
−INx pins (ADA4098-2 10-lead LFCSP) and the SHDN pin and
SHDNx pins, respectively, fast edges on the −IN pin and −INx
pins may ac-couple to the adjacent high impedance SHDN pin and
SHDNx pins, inadvertently placing the devices in shutdown. If this
scenario is a concern, add a 1 nF capacitor between the SHDN pin
and SHDNx pins and the −VS pin.
Alternatively, the amplifiers can be effectively placed in a low power
state by removing +VS. In this low power state, the inputs typically
leak <1 nA with either the ±IN pins (ADA4098-1) or ±INx pins
(ADA4098-2 10-lead LFCSP) biased between −VS and 70 V above
−VS. If the ±IN pins and ±INx pins are taken below −VS, they
appear as a diode connected to the −VS supply in series with a
resistance of 880 Ω. In this condition, limit the current to <20 mA.
Using an external source to drive the output beyond either ±VS
supply under shutdown conditions may produce unlimited current
and may damage the devices.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com