Data Sheet

ADA4098-1/ADA4098-2

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. B | 10 of 33

Figure 4. Pin Configuration for ADA4098-1 6-Lead TSOT

Table 6. Pin Function Descriptions for ADA4098-1 6-Lead TSOT

Pin No.

Mnemonic

Description

1

VOUT

Amplifier Output.

2

−VS

Negative Power Supply. In single-supply applications, the −VS pin is normally soldered to a low impedance ground plane. In split-supply

applications, bypass the −VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the −VS pin as possible.

3

+IN

Noninverting Input of the Amplifier.

4

−IN

Inverting Input of the Amplifier.

5

SHDN

Op Amp Shutdown. The threshold for shutdown is approximately 1 V above the negative supply. If the SHDN pin is hard tied to the −VS pin

or floating, the amplifier is active. If the SHDN pin is asserted high (VSHDN > −VS + 1.5 V), the amplifier is placed in a shutdown state, and the

output of the amplifier goes to a high impedance state. If the SHDN pin is left floating, it is recommended to connect a small capacitor of 1 nF

between the SHDN pin and the −VS pin to prevent signals from the −IN pin from capacitively coupling to the SHDN pin.

6

+VS

Positive Power Supply. Bypass the +VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the +VS pin as

possible.

Figure 5. Pin Configuration for ADA4098-2 8-Lead SOIC_N and 8-Lead MSOP

Table 7. Pin Function Descriptions for ADA4098-2 8-Lead SOIC_N and 8-Lead MSOP

Pin No.

Mnemonic

Description

1

VOUT1

Amplifier Output, Channel 1.

2

−IN1

Inverting Input of the Amplifier, Channel 1.

3

+IN1

Noninverting Input of the Amplifier, Channel 1.

4

−VS

Negative Power Supply. In single-supply applications, the −VS pin is normally soldered to a low impedance ground plane. In

split-supply applications, bypass the −VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the

−VS pin as possible.

5

+IN2

Noninverting Input of the Amplifier, Channel 2

6

−IN2

Inverting Input of the Amplifier, Channel 2.

7

VOUT2

Amplifier Output, Channel 2.

8

+VS

Positive Power Supply. Bypass the +VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the

+VS pin as possible.