Data Sheet

ADA4098-1/ADA4098-2

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. B | 11 of 33

Figure 6. Pin Configuration for ADA4098-2 10-Lead LFCSP

Table 8. Pin Function Descriptions for ADA4098-2 10-Lead LFCSP

Pin No.

Mnemonic

Description

1

VOUT1

Amplifier Output, Channel 1.

2

−IN1

Inverting Input of the Amplifier, Channel 1.

3

+IN1

Noninverting Input of the Amplifier, Channel 1.

4

−VS

Negative Power Supply. In single-supply applications, the −VS pin is normally soldered to a low impedance ground plane. In

split-supply applications, bypass the −VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the

−VS pin as possible.

5

SHDN1

Op Amp Shutdown, Channel 1. The threshold for shutdown is approximately 1 V above the negative supply. If the SHDN1 pin is

hard tied to the −VS pin or floating, the amplifier is active. If the SHDN1 pin is asserted high (VSHDN > −VS + 1.5 V), the amplifier

is placed in a shutdown state, and the output of the amplifier goes to a high impedance state. If the SHDN1 pin is left floating, it is

recommended to connect a small capacitor of 1 nF between the SHDN1 pin and the −VS pin to prevent signals from the −INx pins

from capacitively coupling to the SHDN1 pin.

6

SHDN2

Op Amp Shutdown, Channel 2. The threshold for shutdown is approximately 1 V above the negative supply. If the SHDN2 pin is

hard tied to the −VS pin or floating, the amplifier is active. If the SHDN2 pin is asserted high (VSHDN > −VS + 1.5 V), the amplifier

is placed in a shutdown state, and the output of the amplifier goes to a high impedance state. If the SHDN2 pin is left floating, it is

recommended to connect a small capacitor of 1 nF between the SHDN2 pin and the −VS pin to prevent signals from the −INx pins

from capacitively coupling to the SHDN2 pin.

7

+IN2

Noninverting Input of the Amplifier, Channel 2.

8

−IN2

Inverting Input of the Amplifier, Channel 2.

9

VOUT2

Amplifier Output, Channel 2.

10

+VS

Positive Power Supply. Bypass the +VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the

+VS pin as possible.

EPAD

Exposed Pad. Connect the exposed pad to −VS.