TDF8541JSSLASHN2 datasheet(12/54 Pages) NXP

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TDF8541

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Product data sheet

Rev. 3 — 13 December 2011

12 of 54

NXP Semiconductors

TDF8541

I2C-bus controlled 4

 45 W power amplifier

7.4.3 Speaker fault detection

There are two protection features available to prevent damage to the speaker if one side

of the speaker is connected to ground.

• A check for a speaker fault operates during start-up. This is included in the check for a

short to ground; the channel that has the speaker fault is switched off. If the short to

ground bit is set, it can mean either a short to ground or a speaker fault. At start-up it

is difficult to distinguish between a speaker fault and a short to ground. The amplifier

is protected against both, but the speaker fault bit is not always set.

• A check for a speaker fault operates continuously. If a speaker fault is detected, bit D6

in registers DB1 to DB4 are set but the amplifier is not switched off and pin DIAG is

not pulled LOW.

7.4.4 Overvoltage warning and load dump protection

If the battery voltage VP exceeds the maximum value of Vth(ovp), the device switches off

the output stages of the amplifier to protect the output transistors. The overvoltage

pre-warning bit is set when the supply voltage level exceeds the value of VP(ovp)pwarn.

The functionality of the diagnostic output can be chosen in I2C-bus mode. In this mode the

pre-warning information can become visible at the diagnostic output. In legacy mode, pin

DIAG will not be activated under pre-warning conditions.

Although the amplifier switches off the output stages, the device remains operational

during load dump conditions (maximum value of VP at load dump protection; duration

50 ms, rise time > 2.5 ms). The occurrence of the load dump situation can last for a longer

period of time without damaging the device. Provided that the I2C-bus supply is within the

levels specified, communication with the I2C-bus during load dump situations remains

possible and the status of the channel outputs can be read.

(1) Amplifier output stage.

Fig 8.

Test circuit for loss-of-VP test

Cbuffer

116 mF

2200 μF

PMOS

IRF5305

Vpulse

001aao146

Loss-of-VP tester

DUT in application

(1)

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