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CS8416-CSZ 数据表(PDF) 24 Page - Cirrus Logic |
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CS8416-CSZ 数据表(HTML) 24 Page - Cirrus Logic |
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24 / 60 page ![]() 24 DS578F3 CS8416 clock all the data bits. When in slave mode, the serial audio output port cannot be set for right-justified data. The CS8416 allows immediate mute of the serial audio output port audio data by the MUTESAO bit of Control Register 1. For more information about serial audio formats, refer to the Cirrus Logic applications note AN282, “The 2-Channel Serial Audio Interface: A Tutorial”, available at www.cirrus.com. Figure 7. Serial Audio Output Example Formats X = don’t care to match format, but does need to be set to the desired setting * See Serial Output Data Format Register Bit Descriptions for an explanation of the meaning of each bit SOMS* SOSF* SORES[1:0]* SOJUST* SODEL* SOSPOL* SOLRPOL* Left-Justified X X XX 0 0 0 0 I²S X X XX 0 1 0 1 Right-Justified 1 X XX 1 0 0 0 AES3 Direct X X 11 0 0 0 0 OLRCK OSCLK SDOUT Channel A Channel B Left Justified (Out) OLRCK OSCLK Channel A SDOUT Channel B I²S (Out) OLRCK OSCLK Channel A Channel B MSB SDOUT MSB LSB LSB MSB Extended MSB Extended Right Justified (Out) OLRCK OSCLK Channel A Channel B MSB SDOUT LSB LSB Channel A Channel B LSB LSB MSB MSB MSB AES3 Direct (Out) MSB MSB MSB LSB LSB MSB LSB MSB LSB MSB C U V Z C U V C U V C U V Frame 191 Frame 0 Z |
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