ADL5902ACPZ-R2 datasheet(19/28 Pages) AD

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Data Sheet

ADL5902

Rev. B | Page 19 of 28

VTGT INTERFACE

The target voltage can be set with an external source or by

connecting the VREF pin (nominally 2.3 V) to the VTGT pin

through a resistive voltage divider. With 0.8 V on the VTGT pin,

the rms voltage that must be provided by the VGA to balance the

AGC feedback loop is 0.8 V × 0.05 = 40 mV rms. Most of the

characterization information in this data sheet was collected at

VTGT = 0.8 V. Voltages higher and lower than this can be used;

however, doing so increases or decreases the gain at the internal

squaring cell, which results in a corresponding increase or decrease

in intercept. This, in turn, affects the sensitivity and the usable

measurement range, in addition to the sensitivity to different

carrier modulation schemes. As VTGT decreases, the squaring

circuits produce more noise; this becomes noticeable in the output

response at low input signal amplitudes. As VTGT increases,

measurement error due to modulation increases and temperature

drift tends to decrease. The chosen VTGT value of 0.8 V represents a

compromise between these characteristics.

VTGT

50kΩ

10kΩ

ESD

VPOS

COMM

g × X2

ITGT

Figure 44. VTGT Interface

BASIS FOR ERROR CALCULATIONS

The slope and intercept used in the error plots are calculated using

the coefficients of a linear regression performed on data collected

in the central operating range. The error plots in the Typical

Performance Characteristics section are shown in two formats:

error from the ideal line and error with respect to the 25°C output

voltage. The error from the ideal line is the decibel difference in

VOUT from the ideal straight-line fit of VOUT calculated by the

linear-regression fit over the linear range of the detector, typically

at 25°C. The error in decibels is calculated by

Error (dB) = (VOUT − Slope × (PIN − PZ))/Slope

(15)

where PZ is the x-axis intercept expressed in decibels relative to

1 milliwatt (the input amplitude produces a 0 V output if such an

output is possible).

The error from the ideal line is not a measure of absolute accuracy

because it is calculated using the slope and intercept of each device.

However, it verifies the linearity and the effect of temperature

and modulation on the response of the device.

An example of this type of plot is Figure 3. The slope and

intercept that form the ideal line are those at 25°C with CW

modulation. Figure 21 and Figure 24 show the error with various

popular forms of modulation with respect to the ideal CW line.

This method for calculating error is accurate, assuming that

each device is calibrated at room temperature.

In the second plot format, the VOUT voltage at a given input

amplitude and temperature is subtracted from the corresponding

VOUT at 25°C and then divided by the 25°C slope to obtain an error

in decibels. This type of plot does not provide any information

on the linear-in-dB performance of the device; it merely shows

the decibel equivalent of the deviation of VOUT over temperature,

given a calibration at 25°C. When calculating error from any

one particular calibration point, this error format is accurate. It

is accurate over the full range shown on the plot assuming that

enough calibration points are used. Figure 6 shows this plot type.

The error calculations for Figure 30 are similar to those for the

VOUT plots. The slope and intercept of the VTEMP function vs.

temperature are determined and applied as follows:

Error (°C) = (VTEMP − Slope × (Temp − TZ))/Slope

(16)

where:

TZ is the x-axis intercept expressed in degrees Celsius (the temp-

erature that results in a VTEMP of 0 V if possible).

Temp is the ambient temperature of the ADL5902 in degrees

Celsius.

Slope is, typically, 4.9 mV/°C.

VTEMP is the voltage at the TEMP pin at that temperature.

MEASUREMENT MODE BASIC CONNECTIONS

Figure 45 shows the basic connections for operating the ADL5902

as they are implemented on the device evaluation board. The

ADL5902 requires a single supply of nominally 5 V. The supply

is connected to the two VPOS supply pins. These pins must

each be decoupled using the two capacitors with values equal or

similar to those shown in Figure 45. These capacitors must be

placed as close as possible to the VPOS pins.

An external 60.4 Ω resistor (R3) combines with the relatively high

RF input impedance of the ADL5902 to provide a broadband 50 Ω

match. An ac coupling capacitor must be placed between this

resistor and INHI. The INLO input must be ac-coupled to ground

using the same value capacitor. Because the ADL5902 has a

minimum input operating frequency of 50 MHz, 100 pF ac

coupling capacitors can be used.

The ADL5902 is placed in measurement mode by connecting

VOUT to VSET. In measurement mode, the output voltage is

proportional to the log of the rms input signal level.

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