ADL5902ACPZ-R2 datasheet(23/28 Pages) AD

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Data Sheet

ADL5902

Rev. B | Page 23 of 28

OUTPUT VOLTAGE SCALING

The output voltage range of the ADL5902 (nominally 0.3 V to

3.5 V) can be easily increased or decreased. There are a number

of situations where adjustment of the output scaling makes sense.

For example, if the ADL5902 is driving an analog-to-digital

converter (ADC) with a 0 V to 5 V input range, it makes sense

to increase the detector nominal maximum output voltage of

3.5 V so that it is closer to 5 V. This makes better use of the input

range of the ADC and maximizes the resolution of the system

in terms of bits/dB. For more information on interfacing the

ADL5902 to an ADC, please refer to Circuit Note CN0178.

If only a part of the ADL5902 RF input power range is being

used (for example, −10 dBm to −60 dBm), it can make sense to

increase the scaling so that this reduced input range fits into the

ADL5902 available output swing of 0 V to 4.8 V.

The output swing can also be reduced by simply adding a

voltage divider on the output pin, as shown in the circuit on the

left-hand side of Figure 49. Reducing the output scaling can, for

example, be used when interfacing the ADL5902 to an ADC

with a 0 V to 2.5 V input range. Recommended scaling resistors

for a slope decrease are provided in Table 7.

The output voltage swing can be increased using a technique

that is analogous to setting the gain of an op amp in noninverting

mode with the VSET pin being the equivalent of the inverting

input of the op amp. This is shown in the circuit on the left-hand

side of Figure 49.

Connecting VOUT to VSET results in the nominal 0 V to 3.5 V

swing and a slope of approximately 53 mV/dB (this varies slightly

with frequency). Figure 49 and Table 7 show the configurations

for increasing the slope, along with recommended standard

resistor values for particular input ranges and output swings.

VSET

VOUT

VSET

R15

VOUT

Figure 49. Decreasing and Increasing Slope

Table 7. Output Voltage Range Scaling

Desired

Input

Range

(dBm)

(Ω)

R15

(Ω)

New

Slope

(mV/dB)

Nominal

Output

Voltage

Range (V)

0 to −60

665

2000

72.1

0.195 to 4.52

−10 to −50

1180

2000

86.3

1.096 to 4.55

0 to −60

806

2000

38.3

0.103 to 2.49

−10 to −50

324

2000

46.2

0.587 to 2.43

Equation 17 is the general function that governs this.

















)

(

(17)

where:

VO is the nominal maximum output voltage (see Figure 6

through Figure 18).

V'O is the new maximum output voltage (for example, up to 4.8 V).

RIN is the VSET input resistance (72 kΩ).

When choosing R6 and R2, attention must be paid to the current

drive capability of the VOUT pin and the input resistance of the

VSET pin. The choice of resistors must not result in excessive

current draw out of VOUT. However, making R6 and R2 too

large is also problematic. If the value of R2 is compatible with the

input resistance of the VSET input (72 kΩ), this input resistance,

which varies slightly from device to device, contributes to the

resulting slope and output voltage. In general, the value of R2

must be at least ten times smaller than the input resistance of

VSET. Values for R6 and R2 must, therefore, be in the 1 kΩ to

5 kΩ range.

It is also important to take into account device to device and

frequency variation in output swing along with the ADL5902

output stage maximum output voltage of 4.8 V. The VOUT

distribution is well characterized at major frequencies’ bands in

the Typical Performance Characteristics section (see Figure 6

through Figure 8, Figure 12 through Figure 14, Figure 18, and

Figure 19). The resistor values in Table 7, which are calculated

based on 900 MHz performance, are conservatively chosen so

that there is no chance that the output voltages exceed the

ADL5902 output swing or the input range of a 0 V to 2.5 V and

0 V to 5 V ADC. Because the output swing does not vary much

with frequency (it does start to drop off above 3 GHz), these

values work for multiple frequencies.

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