ADL5906SCPZN-R7 datasheet(22/30 Pages) AD

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Data Sheet

ADL5906

THEORY OF OPERATION

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Rev. B | 22 of 30

Table 5 shows the recommended minimum values of CRMS for

popular modulation schemes. Using lower capacitor values results

in rms measurement errors. Output response time is also shown. If

the output noise shown in Table 5 is unacceptably high, it can be

reduced by

►

Increasing CRMS

►

Implementing an averaging algorithm after the output voltage of

the ADL5906 has been sampled by an analog-to-digital convert-

er (ADC)

The values in Table 5 were experimentally determined to be the

minimum capacitance that ensures good rms accuracy for that

particular signal type. This test was carried out by starting out with a

large capacitance value on the CRMS pin (for example, 10 µF). The

value of VRMS was noted for a fixed input power level (for example,

−10 dBm). The value of CRMS was then progressively reduced (this

can be done with press-down capacitors) until the value of VRMS

started to deviate from its original value (this indicates that the

accuracy of the rms computation is degrading and that CRMS is

becoming too small).

In general, the minimum required rms averaging capacitance in-

creases as the peak-to-average ratio of the carrier increases. The

minimum required CRMS also tends to increase as the bandwidth

of the carrier decreases. With narrow-band carriers, the noise

spectrum of the VRMS output tends to have a correspondingly

narrow profile. The relatively narrow spectral profile demands a

larger value of CRMS that reduces the low-pass corner frequency of

the averaging function and ensures a valid rms computation.

OUTPUT VOLTAGE SCALING

The linear output voltage range of the ADL5906 is nominally 0.3 V

to 3.7 V. VRMS is clamped to a maximum voltage of ~3.9 V; this

helps improve falling edge settling speeds because the VRMS output

stays closer to the nominal linear-in-dB output range of 0.3 V to 3.7

V. Within the 0 V to 3.9 V maximum output range, the slope can be

adjusted as needed via extra resistors, as shown in Figure 52.

If only a part of the RF input power range of the ADL5906 is being

used (for example, −10 dBm to −60 dBm), increase the scaling so

that this reduced input range fits into the available output swing (0 V

to 3.9 V) of the ADL5906.

The output swing is reduced by simply adding a voltage divider on

the output pin, as shown in the A side of Figure 52. Reducing the

output scaling can be used when interfacing the ADL5906 to an

ADC with a 0 V to 2.5 V input range.

Figure 52. Decreasing and Increasing Slope

The output voltage swing can be increased using a technique that

is analogous to setting the gain of an op amp in noninverting

mode (see the B side of Figure 52) with the VSET pin being the

equivalent of the inverting input of the op amp.

With VRMS connected to VSET, the nominal transfer function of the

ADL5906 is given by

VRMS = Slope × (PIN − Intercept)

For example at 3.5 GHz, with PIN equal to 0 dBm, the nominal

output voltage is equal to 0.052 V/dB × (0 dBm − (−64 dBm) =

3.328 V.

To scale this voltage downward using a resistor divider, choose a

value for R15 and calculate R1 using the following equation:

R1=R15× VRMSV′RMS−1

(11)

To scale this voltage upward, choose a value for R2 and calculate

R6 using the following equation:

R6= R2 RIN V′RMSVRMS−1

(12)

where:

RIN is the input resistance of VSET (72 kΩ).

V'RMS is the desired maximum output voltage.

VRMS is the nominal maximum output voltage before scaling (see

Figure 9 through Figure 26).

When choosing R1, R2, R6, and R15, notice the current drive

capability of the VRMS pin and the input resistance of the VSET

pin. The choice of resistors must not be too small because this

results in excessive current drawn out of the VRMS pin (the VRMS

pin can source a maximum current of 10 mA). However, choosing

an R2 that is too large is also problematic. If the value of R2 chosen

is compatible with the input resistance of the VSET pin (72 kΩ), this

input resistance, which varies slightly from part to part, contributes

to the resulting slope and output voltage. In general, ensure that the

value of R2 is at least 10 times smaller than the input resistance of

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