数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

PPC440SPE-RNB667C 数据表(PDF) 53 Page - Applied Micro Circuits Corporation

部件名 PPC440SPE-RNB667C
功能描述  PowerPC 440SPe Embedded Processor
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AMCC [Applied Micro Circuits Corporation]
网页  http://www.amcc.com
标志 AMCC - Applied Micro Circuits Corporation

PPC440SPE-RNB667C 数据表(HTML) 53 Page - Applied Micro Circuits Corporation

Back Button PPC440SPE-RNB667C Datasheet HTML 49Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 50Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 51Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 52Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 53Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 54Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 55Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 56Page - Applied Micro Circuits Corporation PPC440SPE-RNB667C Datasheet HTML 57Page - Applied Micro Circuits Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 53 / 80 page
background image
PowerPC 440SPe Embedded Processor
Revision 1.23 - Sept 21, 2006
AMCC Proprietary
53
Preliminary Data Sheet
MemDCFdbkD
Feedback driver, for I/O timing measurements.
O
2.5(1.8)V
DDR SDRAM
MemDCFdbkR
Feedback receiver. Connect externally to
MemDCFdbkD.
I
2.5(1.8)V
DDR SDRAM
MemODT0:3
Memory on-die termination control
O
2.5(1.8)V
DDR SDRAM
MemVRef0
Memory reference voltage (SVREF) input.
I
2.5(1.8)V
DDR SDRAM
Volt Ref Rcv
MemVRef1
Memory reference voltage (SVREF) supplemental input.
I
2.5(1.8)V
DDR SDRAM
Volt Ref Sup
RAS
Row Address Strobe.
O
2.5(1.8)V
DDR SDRAM
WE
Write Enable.
O
2.5(1.8)V
DDR SDRAM
Ethernet Interface
EMCCD
Collision detection.
I
3.3V LVTTL
EMCCrS
Carrier sense.
I
3.3V LVTTL
EMCMDClk
Management data clock.
O
3.3V LVTTL
EMCMDIO
Transfer command and status information between MII
and PHY.
I/O
3.3V LVTTL
EMCRxD0:7
Receive data.
I
3.3V LVTTL
EMCRxDV
Receive data valid.
I
3.3V LVTTL
EMCRxErr
Receive error.
I
3.3V LVTTL
EMCRxClk
Receive clock.
I
3.3V LVTTL
EMCRefClk
Reference clock.Typical use: GMII Gigabit interface
I
3.3V LVTTL
EMCTxClk
Transmit clock for 10/100 Mb/s.
I
3.3V LVTTL
EMCGTxClk
Ethernet gigabit transmit clock. 125MHz to PHY
O
3.3V LVTTL
EMCTxD0:7
Transmit data.
O
3.3V LVTTL
EMCTxEn
Transmit data enabled.
O
3.3V LVTTL
EMCTxErr
Transmit error.
O
3.3V LVTTL
Table 6. Signal Functional Description (Sheet 4 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω to 3.3V)
3. Must pull down (recommended value is 1k
Ω)
4. If not used, must pull up (recommended value is 3k
Ω to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com