TLC3544, TLC3548

5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL

ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

SLAS266C – OCTOBER 2000 – REVISED MAY 2003

34

POST OFFICE BOX 655303

APPLICATION INFORMATION

interface with host

Figure 34 shows examples of the interface between a single converter and a host DSP (TMS320C54x

 DSP)

or microprocessor. The C54x is set as FWID = 1 (active pulse width = 1CLK), (R/X) DATDLY = 1 (1 bit data delay),

CLK(X/R)P = 0 (transmit data are clocked out at rising edge of CLK, receive data are sampled on falling edge

of CLK), and FS(X/R)P = 1 (FS is active high). If multiple converters connect to the same C54x, use CS as the

chip select.

The host microprocessor is set as the SPI master with CPOL = 0 (active high clock), and CPHA = 1 (transmit

data is clock out at rising edge of CLK, receive data are sampled at falling edge of CLK). 16 bits (or more) per

transfer is required.

FSR

FSX

DX

DR

CLKR

CLKX

IRQ

TMS320C54X

Converter

10 k

Ω

VDD

CS

FS

SDI

SDO

SCLK

INT/EOC

Ain

Single Converter Connects to DSP

SS

MOSI

MISO

SCK

IRQ

Host

Microprocessor

Converter

10 k

Ω

VDD

CS

FS

SDI

SDO

SCLK

INT/EOC

Ain

Converter Connects to Microprocessor

10 k

Ω

Figure 34. Typical Interface to Host DSP and Microprocessor

sampling time analysis

Figure 35 shows the equivalent analog input circuit of the converter. During the sampling, the input capacitor,

VI = Input Voltage at AIN

VS = External Driving Source Voltage

RS = Source Resistance

ri = Equivalent Resistor of Mux., 1.5 kΩ

CI = Input Capacitance, 30 pF Max.

VC = Capacitance Charging Voltage

ri

Data Converter

Driving Source

VI

VC

RS

VS

CI

Figure 35. Equivalent Input Circuit Including the Driving Source

TMS320C54x is a trademark of Texas Instruments.