TLC3544, TLC3548

5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL

ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

SLAS266C – OCTOBER 2000 – REVISED MAY 2003

14

POST OFFICE BOX 655303

detailed description (continued)

Charge

Redistribution

DAC

Control

Logic

_

+

REFM

Ain

ADC Code

Figure 5. Simplified Block Diagram of the Successive-Approximation System

analog input range and internal test voltages

TLC3548 has eight analog inputs (TLC3544 has four) and three test voltages. The inputs are selected by the

analog multiplexer according to the command entered (see Table 1). The input multiplexer is a break-

before-make type to reduce input-to-input noise injection resulting from channel switching.

The TLC3544 and TLC3548 are specified for a unipolar input range of 0-V to 4-V when the internal reference

is selected, and 0-V to 5-V when an external 5-V reference is used.

analog input mode

Two input signal modes can be selected: single-ended input and pseudodifferential input.

_

+

Charge

Redistribution

DAC

Control

Logic

Ain(+)

REFM

ADC Code

S1

Ain(–)

When sampling, S1 is closed and S2 connects to Ain(–).

During conversion, S1 is open and S2 connects to REFM.

Figure 6. Simplified Pseudodifferential Input Circuit

Pseudodifferential input refers to the negative input, Ain(–); its voltage is limited in magnitude to

±0.2 V. The input

frequency limit of Ain(–) is the same as the positive input Ain(+). This mode is normally used for ground noise

rejection or dc bias offset.

When pseudodifferential mode is selected, only two analog input channel pairs are available for the TLC3544

and four channel pairs for the TLC3548, because half the inputs are used as the negative input (see Figure 7).