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P912XDP512F0MFVR 数据表(PDF) 393 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 393 Page - Freescale Semiconductor, Inc |
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393 / 1350 page ![]() Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 393 8.6 Interrupts The PWM module has only one interrupt which is generated at the time of emergency shutdown, if the corresponding enable bit (PWMIE) is set. This bit is the enable for the interrupt. The interrupt flag PWMIF is set whenever the input level of the PWM7 channel changes while PWM7ENA = 1 or when PWMENA is being asserted while the level at PWM7 is active. In stop mode or wait mode (with the PSWAI bit set), the emergency shutdown feature will drive the PWM outputs to their shutdown output levels but the PWMIF flag will not be set. A description of the registers involved and affected due to this interrupt is explained in Section 8.3.2.15, “PWM Shutdown Register (PWMSDN)”. The PWM block only generates the interrupt and does not service it. The interrupt signal name is PWM interrupt signal. |
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