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P912XDP512F0MFVR 数据表(PDF) 396 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 396 Page - Freescale Semiconductor, Inc |
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396 / 1350 page ![]() Chapter 9 Inter-Integrated Circuit (IICV2) Block Description MC9S12XDP512 Data Sheet, Rev. 2.17 396 Freescale Semiconductor 9.1.2 Modes of Operation The IIC functions the same in normal, special, and emulation modes. It has two low power modes: wait and stop modes. 9.1.3 Block Diagram The block diagram of the IIC module is shown in Figure 9-1. Figure 9-1. IIC Block Diagram In/Out Data Shift Register Address Compare SDA Interrupt Clock Control Start Stop Arbitration Control SCL bus_clock IIC Registers |
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