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P912XDP512F0MFVR 数据表(PDF) 185 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 185 Page - Freescale Semiconductor, Inc |
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185 / 1350 page ![]() Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 185 In freeze mode all clocks of the XGATE module may be stopped, depending on the module configuration (see Section 6.3.1.1, “XGATE Control Register (XGMCTL)”). 6.1.4 Block Diagram Figure Figure 6-1 shows a block diagram of the XGATE. Figure 6-1. XGATE Block Diagram 6.2 External Signal Description The XGATE module has no external pins. RISC Core S12X_MMC XGATE Peripherals Semaphores Interrupt Flags Software Triggers Peripheral Interrupts S12X_DBG Software Triggers S12X_INT |
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