P912XDP512F0MFVR datasheet(184/1350 Pages) FREESCALE

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Chapter 6 XGATE (S12XGATEV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

184

Freescale Semiconductor

Special XGATE channel that is not associated with any peripheral service request. A Software

Channel is triggered by its Software Trigger Bit which is implemented in the XGATE module.

XGATE Semaphore

A set of hardware ﬂip-ﬂops that can be exclusively set by either the S12X_CPU or the XGATE.

(see 6.4.4/6-204)

XGATE Thread

A code sequence which is executed by the XGATE’s RISC core after receiving an XGATE request.

XGATE Debug Mode

A special mode in which the XGATE’s RISC core is halted for debug purposes. This mode enables

the XGATE’s debug features (see 6.6/6-206).

XGATE Software Error

The XGATE is able to detect a number of error conditions caused by erratic software (see

6.4.5/6-205). These error conditions will cause the XGATE to seize program execution and ﬂag an

Interrupt to the S12X_CPU.

Word

A 16 bit entity.

Byte

An 8 bit entity.

6.1.2

Features

The XGATE module includes these features:

•

Data movement between various targets (i.e Flash, RAM, and peripheral modules)

•

Data manipulation through built in RISC core

•

Provides up to 112 XGATE channels

— 104 hardware triggered channels

— 8 software triggered channels

•

Hardware semaphores which are shared between the S12X_CPU and the XGATE module

•

Able to trigger S12X_CPU interrupts upon completion of an XGATE transfer

•

Software error detection to catch erratic application code

6.1.3

Modes of Operation

There are four run modes on S12X devices.

•

Run mode, wait mode, stop mode

The XGATE is able to operate in all of these three system modes. Clock activity will be

automatically stopped when the XGATE module is idle.

•

Freeze mode (BDM active)

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