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PCA9633DP2 数据表(PDF) 17 Page - NXP Semiconductors |
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PCA9633DP2 数据表(HTML) 17 Page - NXP Semiconductors |
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17 / 42 page ![]() PCA9633_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 17 of 42 NXP Semiconductors PCA9633 4-bit Fm+ I2C-bus LED driver 7.6 Software Reset The Software Reset Call (SWRST Call) allows all the devices in the I2C-bus to be reset to the power-up state value through a specific formatted I2C-bus command. To be performed correctly, it implies that the I2C-bus is functional and that there is no device hanging the bus. The SWRST Call function is defined as the following: 1. A START command is sent by the I2C-bus master. 2. The reserved SWRST I2C-bus address ‘0000 011’ with the R/W bit set to 0 (write) is sent by the I2C-bus master. 3. The PCA9633 device(s) acknowledge(s) after seeing the SWRST Call address ‘0000 0110’ (06h) only. If the R/W bit is set to 1 (read), no acknowledge is returned to the I2C-bus master. 4. Once the SWRST Call address has been sent and acknowledged, the master sends 2 bytes with 2 specific values (SWRST data byte 1 and byte 2): a. Byte 1 = A5h: the PCA9633 acknowledges this value only. If byte 1 is not equal to A5h, the PCA9633 does not acknowledge it. b. Byte 2 = 5Ah: the PCA9633 acknowledges this value only. If byte 2 is not equal to 5Ah, then the PCA9633 does not acknowledge it. If more than 2 bytes of data are sent, the PCA9633 does not acknowledge any more. 5. Once the right 2 bytes (SWRST data byte 1 and byte 2 only) have been sent and correctly acknowledged, the master sends a STOP command to end the SWRST Call: the PCA9633 then resets to the default value (power-up value) and is ready to be addressed again within the specified bus free time (tBUF). The I2C-bus master must interpret a non-acknowledge from the PCA9633 (at any time) as a ‘SWRST Call Abort’. The PCA9633 does not initiate a reset of its registers. This happens only when the format of the SWRST Call sequence is not correct. |
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