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TMP86CS64AFG 数据表(PDF) 69 Page - Toshiba Semiconductor

部件名 TMP86CS64AFG
功能描述  8 Bit Microcontroller
PDF  202 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TMP86CS64AFG 数据表(HTML) 69 Page - Toshiba Semiconductor

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Page 59
TMP86CS64AFG
5.4 Port P3 (P37 to P30)
Port P3 is an 8-bit input/output port, which can be configured individually as an input or an output under software
control. Input/output mode is specified by the corresponding bit in the port P3 input/output control register (P3CR).
During reset, the P3CR is initialized to “0”, which configures port P3 as an input mode. The P3 output latches
(P3DR) are also initialized to “1”.
Port P30, P31 and P32 are also used as TC4/PWM4/PDO4, TC5/PWM5/PDO5 and TC6/PWM6/PDO6. When used as
secondary function pin, the input pins (TC4, TC5, TC6) should be set to the input mode and the output pins (PWM4/
PDO4
, PWM5/PDO5, PWM6/PDO6) should be set to the output.
Port P33, P34, P35, P36 and P37 are also used as SCK1, SI1, SO1, SI2 and SO2. When used as secondary function
pin, SCK1 should be set to the input or output mode, SI1 and SI2 should be set to the input mode, SO1 and SO2
should be set to the output mode.
Note 1: i = 7 to 0
Note 2: STOP: bit 7 in SYSCR1, OUTEN: bit 4 in SYSCR1
Figure 5-5 Port P3
Note: When used as an input mode, read-modify-write instructions such as bit manipulate instructions cannot be used. Read-
modify-write instruction writes the all data of 8-bit after read and modified. Because a bit setting input mode reads data of
terminal, the output latch is changed by these instructions.
P3DR
(0003H)
76
543
21
0
P37
SO2
P36
SI2
P35
SO1
P34
SI1
P33
SCK1
P32
TC6
PWM6
PDO6
P31
TC5
PWM5
PDO5
P30
TC4
PWM4
PDO4
(Initial value: 1111 1111)
P3CR
(000BH)
76
543
21
0
P3CR7
P3CR6
P3CR5
P3CR4
P3CR3
P3CR2
P3CR1
P3CR0
(Initial value: 0000 0000)
P3CR
I/O control for port P3
(specified for each bit)
0: Input mode
1: Output mode
R/W
STOP
OUTEN
Data input
Data output
P3CRi
Control output
Control input
Output latch
P3i
D
Q



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