TMP86CS64AFG datasheet(29/202 Pages) TOSHIBA

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Page 19

TMP86CS64AFG

2.2.3.3 STOP Mode

In the STOP mode, all system operations including oscillators are halted, and the internal conditions

immediately before the halt are retained with low-power dissipation.

The STOP mode is entered by setting the system control register 1, and exited with the STOP pin input.

After the warm-up period time has expired, the CPU returns to the mode it was before entering the STOP

mode, and program execution resumes with the instruction immediately following the instruction that

activated the STOP mode.

2.2.3.4 Operation Mode Transition

Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL mode: SLOW1 and SLOW2 are called SLOW mode:

IDLE0 and IDLE1 and IDLE2 are called IDLE mode: SLEEP0, SLEEP1 and SLEEP2 are called SLEEP mode.

Note 2: This mode is exited at the falling edge of the source clock selected in TBTCR<TBTCK>.

Figure 2-6 Operating Mode Transition

IDLE0

mode

RESET

NORMAL1

mode

STOP

NORMAL2

mode

SLOW2

mode

SLOW1

mode

IDLE1

mode

IDLE2

mode

SLEEP2

mode

SLEEP1

mode

SLEEP0

mode

(a) Single-clock mode

(b) Dual-clock mode

SYSCR2<IDLE> = "1"

SYSCR1<STOP> = "1"

SYSCR2<IDLE> = "1"

SYSCR1<STOP> = "1"

SYSCR2<IDLE> = "1"

SYSCR1<STOP> = "1"

Interrupt

STOP pin input

Interrupt

STOP pin input

Interrupt

STOP pin input

(Note 2)

SYSCR2<TGHALT> = "1"

SYSCR2<XTEN> = "0"

SYSCR2<XTEN> = "1"

SYSCR2<SYSCK> = "0"

SYSCR2<SYSCK> = "1"

SYSCR2<XEN> = "1"

SYSCR2<XEN> = "0"

SYSCR2<TGHALT> = "1"

Reset released

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