ADIN1101BCPZ-R7 datasheet(65/79 Pages) AD

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Data Sheet

ADIN1101

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Rev. A | 65 of 79

Table 103. Bit Descriptions for CRSM_STAT (Continued)

Bits

Bit Name

Description

Reset

Access

CRSM_SFT_PD_RDY

Software Power-Down Status. This bit indicates that the system is in the software power-down

state.

0x0

CRSM_SYS_RDY

System Ready. This bit indicates that the start-up sequence is complete and the system is ready for

normal operation.

0x0

CRSM Power Management Control Register

Device Address: 0x1E; Register Address: 0x8819, Reset: 0x0000, Name: CRSM_PMG_CNTRL

Table 104. Bit Descriptions for CRSM_PMG_CNTRL

Bits

Bit Name

Description

Reset

Access

[15:1]

RESERVED

Reserved.

0x0

CRSM_FRC_OSC_EN

Force Digital Boot Oscillator Clock Enable.

0x0

R/W

MAC Interface Configuration Register

Device Address: 0x1E; Register Address: 0x882B, Reset: 0x0000, Name: CRSM_MAC_IF_CFG

Configure the MAC interface only by pins. Do not change by software.

Table 105. Bit Descriptions for CRSM_MAC_IF_CFG

Bits

Bit Name

Description

Reset

Access

CRSM_RMII_CLK50

This bit Indicates if the RMII REF_CLK frequency is 50 MHz or 25 MHz. Only

for debugging purposes.

Pin dependent

R/W

CRSM_RMII_CLK_EN

CRSM RMII Clock Enable Status. This bit indicates if the RMII clock

generation is enabled.

Pin dependent

R/W

[13:9]

RESERVED

Reserved.

0x0

CRSM_RMII_MEDIA_CNV_EN

Media Converter Enable. When this bit is 1, the media converter functionality

for the RMII MAC interface mode is enabled. Note that the media convertor

functionality can only be enabled if an RMII MAC interface is being used.

Pin dependent

R/W

[7:5]

RESERVED

Reserved.

0x0

CRSM_RMII_EN

RMII MAC Interface Enable. Enable RMII MAC interface mode. Do not set

CRSM_RGMII_EN and CRSM_RMII_EN at the same time. Configure the

MAC interface only by pins. Do not change by software.

Pin dependent

R/W

[3:1]

RESERVED

Reserved.

0x0

CRSM_RGMII_EN

RGMII MAC Interface Enable. Enable RGMII MAC interface mode. Do not

set CRSM_RGMII_EN and CRSM_RMII_EN at the same time. Configure the

MAC interface only by pins. Do not change by software.

Pin dependent

R/W

CRSM Diagnostics Clock Control Register

Device Address: 0x1E; Register Address: 0x882C, Reset: 0x0002, Name: CRSM_DIAG_CLK_CTRL

CRSM diagnostics clock control.

Table 106. Bit Descriptions for CRSM_DIAG_CLK_CTRL

Bits

Bit Name

Description

Reset

Access

[15:1]

RESERVED

Reserved.

0x1

CRSM_DIAG_CLK_EN

Enable the Diagnostics Clock.

0x0

R/W

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