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ST7LITE0XY0 数据表(PDF) 48 Page - STMicroelectronics |
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ST7LITE0XY0 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 124 page ![]() ST7LITE0xY0, ST7LITESxY0 48/124 11 ON-CHIP PERIPHERALS 11.1 LITE TIMER (LT) 11.1.1 Introduction The Lite Timer can be used for general-purpose timing functions. It is based on a free-running 8-bit upcounter with two software-selectable timebase periods, an 8-bit input capture register and watch- dog function. 11.1.2 Main Features ■ Realtime Clock – 8-bit upcounter – 1 ms or 2 ms timebase period (@ 8 MHz fOSC) – Maskable timebase interrupt ■ Input Capture – 8-bit input capture register (LTICR) – Maskable interrupt with wakeup from Halt Mode capability ■ Watchdog – Enabled by hardware or software (configura- ble by option byte) – Optional reset on HALT instruction (configura- ble by option byte) – Automatically resets the device unless disable bit is refreshed – Software reset (Forced Watchdog reset) – Watchdog reset status flag Figure 31. Lite Timer Block Diagram LTCSR WATCHDOG 8-bit UPCOUNTER /2 8-bit fLTIMER fWDG 8 LTIC fOSC/32 WDGD WDGE WDG TBF TBIE TB ICF ICIE WATCHDOG RESET LTTB INTERRUPT REQUEST LTIC INTERRUPT REQUEST LTICR INPUT CAPTURE REGISTER 1 0 1 or 2 ms Timebase (@ 8 MHz fOSC) To 12-bit AT TImer fLTIMER RF 0 7 1 |
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