ADL6332ACCZB-R7 datasheet(30/55 Pages) AD

30 / 55 page

Data Sheet

ADL6332

PROGRAMMABILITY GUIDE

analog.com

Rev. A | 30 of 55

RF PATH PRECONFIGURATION

ADL6332 has four preconfigurable RF gain settings, which are

selected with the ATTSEL0 and ATTSEL1 pins. The configurable

parameters (fixed gain or bypass attenuation mode in AMP1 and

AMP2, and DSA attenuation level) are stored in four register

spaces (Table 11, Table 12, Table 13, Table 14, Table 15), which are

called RF State A, B, C, and D.

- State A: SIG_PATH0_2 in Register 0x10A

- State B: SIG_PATH1_2 in Register 0x10B

- State C: SIG_PATH2_2 in Register 0x10C

- State D: SIG_PATH3_2 in Register 0x10D

Each mode can configure the full RF chain after reset is asserted.

Table 11 shows the default settings for each mode. Overwrite the

parameters before or during operation.

This feature allows to switch the RF performance rapidly using

asynchronous external control.

Table 11. Four Preconfiguration Registers with Default/Reset RF Parameters

State

ATTSEL1

(Pin 6)

ATTSEL0

(Pin 13)

Reg.

Address

Reg. Name

Bits

Bit 7

Bit 6

Bits[5:0], DSA Setting 0 dB to 24.0 dB at 1.0 dB

Step

AMP2 Setting:

Bypass

Attenuation/

Fixed Gain

AMP1 Setting:

Bypass

Attenuation/

Fixed Gain

0x10A

SIG_PATH0

[7:0]

Default =

Bypass

Attenuation

Default =

Bypass

attenuation

Default = 24.0 dB Attenuation

0x10B

SIG_PATH1

[7:0]

Default = Fixed

Gain

Default = Fixed

Gain

Default = 16.0 dB Attenuation

0x10C

SIG_PATH2

[7:0]

Default = Fixed

Gain

Default = Fixed

Gain

Default = 8.0 dB Attenuation

0x10D

SIG_PATH3

[7:0]

Default = Fixed

Gain

Default = Fixed

Gain

Default = 0.0 dB Attenuation

Table 12. Register 0x10A: State A

Bits

Bit Name

Description

Reset

Access

AMP2_BYPASS0

Amp 2 Bypass State A Setting.

0x1

R/W

0: Fixed gain mode

1: Bypass attenuation mode

AMP1_BYPASS0

Amp 1 Bypass State A Setting.

0x1

R/W

0: Fixed gain mode

1: Bypass attenuation mode

[5:0]

DSA_ATTN0

DSA Attenuator State A Setting.

0x18

R/W

0: 0 dB

1: 1 dB

2: 2 dB

...

24: 24 dB

Table 13. Register 0x10B: State B

Bits

Bit Name

Description

Reset

Access

AMP2_BYPASS1

Amp 2 Bypass State B Setting.

0x0

R/W

0: Fixed gain mode

1: Bypass attenuation mode

AMP1_BYPASS1

Amp 1 Bypass State B Setting.

0x0

R/W

0: Fixed gain mode

1: Bypass attenuation mode

[5:0]

DSA_ATTN1

DSA Attenuator State B Setting.

0x10

R/W

0: 0 dB

ADL6332ACCZB-R7 数据表(PDF) 30 Page - Analog Devices

ADL6332ACCZB-R7 数据表(HTML) 30 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

数据表下载

链接网址

ADL6332ACCZB-R7 数据表(PDF) 30 Page - Analog Devices

ADL6332ACCZB-R7 数据表(HTML) 30 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

数据表 下载

链接网址

数据表下载