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ADL6332ACCZB-R7 数据表(PDF) 31 Page - Analog Devices

部件名 ADL6332ACCZB-R7
功能描述  0.38 GHz to 15 GHz RxVGA
PDF  55 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6332ACCZB-R7 数据表(HTML) 31 Page - Analog Devices

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Data Sheet
ADL6332
PROGRAMMABILITY GUIDE
analog.com
Rev. A | 31 of 55
Table 13. Register 0x10B: State B (Continued)
Bits
Bit Name
Description
Reset
Access
1: 1 dB
...
16: 16 dB
...
24: 24 dB
Table 14. Register 0x10C: State C
Bits
Bit Name
Description
Reset
Access
7
AMP2_BYPASS2
Amp 2 Bypass State C Setting.
0x0
R/W
0: Fixed gain mode
1: Bypass attenuation mode
6
AMP1_BYPASS2
Amp 1 Bypass State C Setting.
0x0
R/W
0: Fixed gain mode
1: Bypass attenuation mode
[5:0]
DSA_ATTN2
DSA Attenuator State C Setting.
0x8
R/W
0: 0 dB
1: 1 dB
...
8: 8 dB
...
24: 24 dB
Table 15. Register 0x10D: State D
Bits
Bit Name
Description
Reset
Access
7
AMP2_BYPASS3
Amp 2 Bypass State D Setting.
0x0
R/W
0: Fixed gain mode
1: Bypass attenuation mode
6
AMP1_BYPASS3
Amp 1 Bypass State D Setting.
0x0
R/W
0: Fixed gain mode
1: Bypass attenuation mode
[5:0]
DSA_ATTN3
DSA Attenuator State D Setting.
0x0
R/W
0: 0 dB
1: 1 dB
...
24: 24 dB



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