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ADL6332ACCZB-R7 数据表(PDF) 37 Page - Analog Devices

部件名 ADL6332ACCZB-R7
功能描述  0.38 GHz to 15 GHz RxVGA
PDF  55 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6332ACCZB-R7 数据表(HTML) 37 Page - Analog Devices

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Data Sheet
ADL6332
APPLICATIONS INFORMATION
analog.com
Rev. A | 37 of 55
AC COUPLING
The ESD clamps are located right after input ports and before the
output port (see Figure 100). When a DC voltage greater than
or equal to 1.0 V is applied as common-mode, there is a risk of
latching the silicon controlled rectifier (SCR) clamps in the ESD
protection block with a single spike. Even with a DC voltage less
than 1 V, intermodulation (IM) performance of the part may be
degraded. An external DC block capacitor for AC-coupled is always
recommended.
Figure 100. Simplified RF Input and Output Port Structure



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